flash/nor: Add basic support for TI's MSPM0L/G family

Add basic flashing support for Texas Instruments MSPM0L, C and G
family of Cortex-M0 based micro-controllers.

This initial basic flashing support allows for controlling protection,
erase, write and read of non-main flash region.

This has been tested with:
* Valgrind (3.22.0):
  valgrind --leak-check=full --show-leak-kinds=all \
	--track-origins=yes --verbose
* Ubuntu clang version 20.0.0
 (++20241014053649+ed77df56f272-1~exp1~20241014053827.1987)

Valgrind-clean, no new Clang analyzer or sparse warnings have been
introduced.

Change-Id: I29b8055ea6da9c38c5b7b91bea1ec7581c5bc8ff
Co-developed-by: Henry Nguyen <h-nguyen8@ti.com>
Signed-off-by: Henry Nguyen <h-nguyen8@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8384
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

doc/openocd.texi

@@ -7401,6 +7401,56 @@ msp432 bsl lock
 @end deffn
 @end deffn
 
+@deffn {Flash Driver} {mspm0}
+
+All Arm Cortex-M0+ MSPM0 microcontroller versions from Texas Instruments
+include internal flash. The mspm0 flash driver automatically recognizes the
+specific version's flash parameters and autoconfigures itself. The main
+program flash starts at address 0x0. Non-main flash starts at 0x41c00000.
+If present on the device, the optional region called "Data" starts at
+0x41d00000.
+
+@b{Warning}:
+
+@itemize @bullet
+@item @b{Reset while MCU operation:} When erasing all of MAIN memory, if the
+MCU is still executing from MAIN memory do not reset the device as it could
+cause a double hard-fault due to the missing interrupt vector table at the
+start of memory. To recover from such scenario reset or power-cycle the MCU.
+
+@item @b{No explicit protection support:} MSPM0 flash controller auto-protect
+themselves after every flash operation. As a result of this, OpenOCD does not
+explicitly provide any protection function and automatically un-protects
+required sections as flash operations are requested.
+@end itemize
+
+@b{Examples}:
+
+@itemize @bullet
+
+@item @b{Flash bank description:}
+@example
+flash bank $_FLASHNAME mspm0 0 0 0 0 $_TARGETNAME
+@end example
+
+@item @b{To erase and program the MAIN region:}
+@example
+halt
+flash erase_sector 0 0 last
+flash write_image MAIN.bin 0x0
+@end example
+
+@item @b{To erase and program the NONMAIN region:}
+@example
+halt
+flash erase_sector 1 0 last
+flash write_image NONMAIN.bin 0x41C00000
+@end example
+
+@end itemize
+
+@end deffn
+
 @deffn {Flash Driver} {niietcm4}
 This drivers handles the integrated NOR flash on NIIET Cortex-M4
 based controllers. Flash size and sector layout are auto-configured by the driver.

src/flash/nor/Makefile.am

@@ -45,6 +45,7 @@ NOR_DRIVERS = \
 	%D%/max32xxx.c \
 	%D%/mdr.c \
 	%D%/msp432.c \
+	%D%/mspm0.c \
 	%D%/mrvlqspi.c \
 	%D%/niietcm4.c \
 	%D%/non_cfi.c \

src/flash/nor/driver.h

@@ -274,6 +274,7 @@ extern const struct flash_driver max32xxx_flash;
 extern const struct flash_driver mdr_flash;
 extern const struct flash_driver mrvlqspi_flash;
 extern const struct flash_driver msp432_flash;
+extern const struct flash_driver mspm0_flash;
 extern const struct flash_driver niietcm4_flash;
 extern const struct flash_driver npcx_flash;
 extern const struct flash_driver nrf51_flash;

src/flash/nor/drivers.c

@@ -51,6 +51,7 @@ static const struct flash_driver * const flash_drivers[] = {
 	&mdr_flash,
 	&mrvlqspi_flash,
 	&msp432_flash,
+	&mspm0_flash,
 	&niietcm4_flash,
 	&npcx_flash,
 	&nrf5_flash,