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git://git.code.sf.net/p/openocd/code
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target: Make use of str_enabled_disabled()
The data type changes introduced in [1,2] lead to implicit casts from a boolean to an integer value in the string selection between "enabled" and "disabled". Use str_enabled_disabled() to get rid of this implicit cast. [1] https://review.openocd.org/c/openocd/+/8988 [2] https://review.openocd.org/c/openocd/+/8992 Change-Id: Ia98abdd43b42f394f5bf0aa845017dfbb0e087fd Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: https://review.openocd.org/c/openocd/+/9007 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This commit is contained in:
Marc Schink
Antonio Borneo
parent
bd32290864
commit
c2b8f994bf
@ -14,6 +14,7 @@
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#include "arm720t.h"
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#include <helper/time_support.h>
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#include <helper/string_choices.h>
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#include "target_type.h"
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#include "register.h"
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#include "arm_opcodes.h"
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@ -227,14 +228,10 @@ static int arm720t_arch_state(struct target *target)
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{
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struct arm720t_common *arm720t = target_to_arm720(target);
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static const char *state[] = {
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"disabled", "enabled"
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};
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arm_arch_state(target);
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LOG_USER("MMU: %s, Cache: %s",
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state[arm720t->armv4_5_mmu.mmu_enabled],
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state[arm720t->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled]);
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str_enabled_disabled(arm720t->armv4_5_mmu.mmu_enabled),
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str_enabled_disabled(arm720t->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled));
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return ERROR_OK;
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}
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@ -12,6 +12,7 @@
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#include "arm920t.h"
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#include <helper/time_support.h>
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#include <helper/string_choices.h>
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#include "target_type.h"
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#include "register.h"
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#include "arm_opcodes.h"
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@ -509,10 +510,6 @@ static int arm920t_verify_pointer(struct command_invocation *cmd,
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/** Logs summary of ARM920 state for a halted target. */
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int arm920t_arch_state(struct target *target)
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{
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static const char *state[] = {
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"disabled", "enabled"
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};
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struct arm920t_common *arm920t = target_to_arm920(target);
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if (arm920t->common_magic != ARM920T_COMMON_MAGIC) {
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@ -522,9 +519,9 @@ int arm920t_arch_state(struct target *target)
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arm_arch_state(target);
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LOG_USER("MMU: %s, D-Cache: %s, I-Cache: %s",
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state[arm920t->armv4_5_mmu.mmu_enabled],
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state[arm920t->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled],
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state[arm920t->armv4_5_mmu.armv4_5_cache.i_cache_enabled]);
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str_enabled_disabled(arm920t->armv4_5_mmu.mmu_enabled),
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str_enabled_disabled(arm920t->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled),
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str_enabled_disabled(arm920t->armv4_5_mmu.armv4_5_cache.i_cache_enabled));
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return ERROR_OK;
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}
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@ -14,6 +14,7 @@
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#include "arm926ejs.h"
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#include <helper/time_support.h>
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#include <helper/string_choices.h>
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#include "target_type.h"
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#include "register.h"
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#include "arm_opcodes.h"
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@ -505,10 +506,6 @@ static int arm926ejs_verify_pointer(struct command_invocation *cmd,
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/** Logs summary of ARM926 state for a halted target. */
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int arm926ejs_arch_state(struct target *target)
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{
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static const char *state[] = {
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"disabled", "enabled"
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};
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struct arm926ejs_common *arm926ejs = target_to_arm926(target);
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if (arm926ejs->common_magic != ARM926EJS_COMMON_MAGIC) {
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@ -518,9 +515,9 @@ int arm926ejs_arch_state(struct target *target)
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arm_arch_state(target);
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LOG_USER("MMU: %s, D-Cache: %s, I-Cache: %s",
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state[arm926ejs->armv4_5_mmu.mmu_enabled],
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state[arm926ejs->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled],
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state[arm926ejs->armv4_5_mmu.armv4_5_cache.i_cache_enabled]);
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str_enabled_disabled(arm926ejs->armv4_5_mmu.mmu_enabled),
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str_enabled_disabled(arm926ejs->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled),
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str_enabled_disabled(arm926ejs->armv4_5_mmu.armv4_5_cache.i_cache_enabled));
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return ERROR_OK;
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}
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@ -18,6 +18,7 @@
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#include "register.h"
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#include <helper/binarybuffer.h>
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#include <helper/string_choices.h>
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#include <helper/command.h>
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#include <stdlib.h>
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@ -480,10 +481,6 @@ int armv7a_init_arch_info(struct target *target, struct armv7a_common *armv7a)
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int armv7a_arch_state(struct target *target)
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{
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static const char *state[] = {
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"disabled", "enabled"
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};
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struct armv7a_common *armv7a = target_to_armv7a(target);
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struct arm *arm = &armv7a->arm;
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@ -496,13 +493,13 @@ int armv7a_arch_state(struct target *target)
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if (armv7a->is_armv7r) {
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LOG_TARGET_USER(target, "D-Cache: %s, I-Cache: %s",
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state[armv7a->armv7a_mmu.armv7a_cache.d_u_cache_enabled],
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state[armv7a->armv7a_mmu.armv7a_cache.i_cache_enabled]);
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str_enabled_disabled(armv7a->armv7a_mmu.armv7a_cache.d_u_cache_enabled),
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str_enabled_disabled(armv7a->armv7a_mmu.armv7a_cache.i_cache_enabled));
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} else {
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LOG_TARGET_USER(target, "MMU: %s, D-Cache: %s, I-Cache: %s",
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state[armv7a->armv7a_mmu.mmu_enabled],
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state[armv7a->armv7a_mmu.armv7a_cache.d_u_cache_enabled],
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state[armv7a->armv7a_mmu.armv7a_cache.i_cache_enabled]);
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str_enabled_disabled(armv7a->armv7a_mmu.mmu_enabled),
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str_enabled_disabled(armv7a->armv7a_mmu.armv7a_cache.d_u_cache_enabled),
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str_enabled_disabled(armv7a->armv7a_mmu.armv7a_cache.i_cache_enabled));
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}
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if (arm->core_mode == ARM_MODE_ABT)
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@ -18,6 +18,7 @@
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#include "register.h"
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#include <helper/binarybuffer.h>
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#include <helper/string_choices.h>
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#include <helper/command.h>
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#include <helper/nvp.h>
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@ -1359,10 +1360,6 @@ static int armv8_aarch64_state(struct target *target)
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int armv8_arch_state(struct target *target)
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{
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static const char * const state[] = {
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"disabled", "enabled"
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};
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struct armv8_common *armv8 = target_to_armv8(target);
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struct arm *arm = &armv8->arm;
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@ -1377,9 +1374,9 @@ int armv8_arch_state(struct target *target)
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arm_arch_state(target);
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LOG_USER("MMU: %s, D-Cache: %s, I-Cache: %s",
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state[armv8->armv8_mmu.mmu_enabled],
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state[armv8->armv8_mmu.armv8_cache.d_u_cache_enabled],
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state[armv8->armv8_mmu.armv8_cache.i_cache_enabled]);
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str_enabled_disabled(armv8->armv8_mmu.mmu_enabled),
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str_enabled_disabled(armv8->armv8_mmu.armv8_cache.d_u_cache_enabled),
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str_enabled_disabled(armv8->armv8_mmu.armv8_cache.i_cache_enabled));
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if (arm->core_mode == ARM_MODE_ABT)
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armv8_show_fault_registers(target);
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@ -22,6 +22,7 @@
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#include "arm_simulator.h"
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#include "arm_disassembler.h"
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#include <helper/time_support.h>
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#include <helper/string_choices.h>
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#include "register.h"
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#include "image.h"
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#include "arm_opcodes.h"
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@ -774,10 +775,6 @@ static int xscale_arch_state(struct target *target)
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struct xscale_common *xscale = target_to_xscale(target);
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struct arm *arm = &xscale->arm;
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static const char *state[] = {
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"disabled", "enabled"
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};
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static const char *arch_dbg_reason[] = {
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"", "\n(processor reset)", "\n(trace buffer full)"
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};
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@ -789,9 +786,9 @@ static int xscale_arch_state(struct target *target)
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arm_arch_state(target);
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LOG_USER("MMU: %s, D-Cache: %s, I-Cache: %s%s",
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state[xscale->armv4_5_mmu.mmu_enabled],
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state[xscale->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled],
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state[xscale->armv4_5_mmu.armv4_5_cache.i_cache_enabled],
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str_enabled_disabled(xscale->armv4_5_mmu.mmu_enabled),
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str_enabled_disabled(xscale->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled),
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str_enabled_disabled(xscale->armv4_5_mmu.armv4_5_cache.i_cache_enabled),
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arch_dbg_reason[xscale->arch_debug_reason]);
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return ERROR_OK;
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