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This change adds a simple target configuration for Freescale single/dual/quad core i.MX6 SoCs, only one core is configured by default. Change-Id: I853dd27f4c6765b7f731be2ddea82e85d496c6a4 Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Reviewed-on: http://openocd.zylin.com/1135 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> |
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.. | ||
board | ||
chip | ||
cpld | ||
cpu/arm | ||
interface | ||
target | ||
test | ||
bitsbytes.tcl | ||
mem_helper.tcl | ||
memory.tcl | ||
mmr_helpers.tcl |