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openocd/tcl/cpld
Sean Anderson b61eae1962 cpld: altera-epm240: Increase adapter speed
According to the datasheet, the minimum clock period with Vccio1 = 1.5V
(the lowest voltage supported) is 143ns, or around 6MHz. Set the default
adapter speed to 5 MHz.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Change-Id: I21cad33fa7f1e25e81f43b5d2214d1fa4ec924de
Reviewed-on: https://review.openocd.org/c/openocd/+/6847
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-02-26 15:29:52 +00:00
..
altera-5m570z-cpld.cfg
altera-epm240.cfg
jtagspi.cfg
lattice-lc4032ze.cfg
xilinx-xc6s.cfg
xilinx-xc7.cfg
xilinx-xcf-p.cfg
xilinx-xcf-s.cfg
xilinx-xcr3256.cfg
xilinx-xcu.cfg