mirror of
git://git.code.sf.net/p/openocd/code
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50 lines
1.5 KiB
INI
50 lines
1.5 KiB
INI
# NXP LPC2478 ARM7TDMI-S with 512kB Flash and 64kB Local On-Chip SRAM (98kB total), clocked with 4MHz internal RC oscillator
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME lpc2478
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x4f1f0f0f
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}
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#delays on reset lines
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jtag_nsrst_delay 100
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jtag_ntrst_delay 100
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# LPC2000 -> SRST causes TRST
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reset_config trst_and_srst srst_pulls_trst
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
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# LPC2478 has 64kB of SRAM on its main system bus (so-called Local On-Chip SRAM)
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$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000 -work-area-size 0x10000 -work-area-backup 0
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$_TARGETNAME configure -event reset-init {
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# Force target into ARM state
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armv4_5 core_state arm
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# Do not remap 0x0000-0x0020 to anything but the Flash
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mwb 0xE01FC040 0x01
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}
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# LPC2378 has 512kB of FLASH, but upper 8kB are occupied by bootloader.
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# After reset the chip uses its internal 4MHz RC oscillator.
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# flash bank lpc2000 <base> <size> 0 0 <target#> <variant> <clock> [calc checksum]
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flash bank lpc2000 0x0 0x7D000 0 0 0 lpc2000_v2 12000 calc_checksum
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# Try to use RCLK, if RCLK is not available use "normal" mode. 4MHz / 6 = 666kHz, so use 500.
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jtag_rclk 500
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