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fe5ed48f40
Jtagspi is using a proxy bitstream to "connect" JTAG to the SPI pins. This is not possible with all FPGA vendors/families. In this cases a dedicated procedure is needed to establish such a connection. This patch adds a jtagspi-mode for these cases. It also adds the needed interfaces to jtagspi and the pld-driver so the driver can select the mode and provide the necessary procedures. For the cases where a proxy bitstream is needed, the pld driver will select the mode and provide instruction code needed in this case. Change-Id: I9563f26739589157b39a3664a73d91152cd13f77 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7822 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> |
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| .. | ||
| altera-5m570z-cpld.cfg | ||
| altera-epm240.cfg | ||
| altera-max10.cfg | ||
| altera-maxii.cfg | ||
| altera-maxv.cfg | ||
| jtagspi.cfg | ||
| lattice-lc4032ze.cfg | ||
| xilinx-xc3s.cfg | ||
| xilinx-xc4v.cfg | ||
| xilinx-xc4vfx_40_60_100_140.cfg | ||
| xilinx-xc5v.cfg | ||
| xilinx-xc5vfx_100_130_200.cfg | ||
| xilinx-xc6s.cfg | ||
| xilinx-xc6v.cfg | ||
| xilinx-xc7.cfg | ||
| xilinx-xc7v.cfg | ||
| xilinx-xc7vh580t.cfg | ||
| xilinx-xc7vh870t.cfg | ||
| xilinx-xcf-p.cfg | ||
| xilinx-xcf-s.cfg | ||
| xilinx-xcr3256.cfg | ||
| xilinx-xcu.cfg | ||