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30f334e3ae
This makes it possible to program newer EFM32 and EFR32 chips with JTAG, as opposed to SWD. Change-Id: Ia3e8c1bbc66fc1f33e8cf2087ccf0d1b4dfd74e1 Signed-off-by: Jonas Norling <jonas.norling@cyanconnode.com> Reviewed-on: http://openocd.zylin.com/4262 Tested-by: jenkins Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
51 lines
1.1 KiB
INI
51 lines
1.1 KiB
INI
#
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# Silicon Labs (formerly Energy Micro) EFM32 target
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#
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# Note: All EFM32 chips have SWD support, but only newer series 1
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# chips have JTAG support.
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#
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source [find target/swj-dp.tcl]
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME efm32
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}
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# Work-area is a space in RAM used for flash programming
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# By default use 2kB
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if { [info exists WORKAREASIZE] } {
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set _WORKAREASIZE $WORKAREASIZE
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} else {
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set _WORKAREASIZE 0x800
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}
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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if { [using_jtag] } {
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set _CPUTAPID 0x4ba00477
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} {
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set _CPUTAPID 0x2ba01477
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}
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}
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swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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adapter_khz 1000
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME
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$_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME efm32 0 0 0 0 $_TARGETNAME
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if {![using_hla]} {
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# if srst is not fitted use SYSRESETREQ to
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# perform a soft reset
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cortex_m reset_config sysresetreq
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}
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