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78c87f5e81
ESP32-S2 is a single core Xtensa chip. Not full featured yet. Some of the missing functionality: -Semihosting -Flash breakpoints -Flash loader -Apptrace -FreeRTOS Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com> Change-Id: I2fb32978e801af5aa21616c581691406ad7cd6bb Reviewed-on: https://review.openocd.org/c/openocd/+/6940 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Ian Thompson <ianst@cadence.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
31 lines
631 B
INI
31 lines
631 B
INI
# SPDX-License-Identifier: GPL-2.0-or-later
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#
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# The ESP32-S2 only supports JTAG.
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transport select jtag
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME esp32s2
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}
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x120034e5
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}
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set _TARGETNAME $_CHIPNAME
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set _CPUNAME cpu
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set _TAPNAME $_CHIPNAME.$_CPUNAME
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jtag newtap $_CHIPNAME $_CPUNAME -irlen 5 -expected-id $_CPUTAPID
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target create $_TARGETNAME esp32s2 -endian little -chain-position $_TAPNAME
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xtensa maskisr on
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$_TARGETNAME configure -event reset-assert-post { soft_reset_halt }
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gdb_breakpoint_override hard
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