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git://git.code.sf.net/p/openocd/code
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38e8d60f79
Various cores with an ETB have its TAP misnamed ... either as a boundary scan TAP or as the iMX "Secure JTAG Controller" (which is, among other things, a JRC that could be used to shorten scan chains). Use the correct name for these TAPs, which we can recognize since their IDs were assigned by ARM and these chips all document the presence of an ETB. The 0x2b900f0f is ETB11; the 0x1b900f0f is an older module, just called "ETB". Also shrink the ETB's IR configuration; the default IR-Capture value is fine, and the mask can specify that all four bits are safe to check (per ARM documentation). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
63 lines
1.6 KiB
INI
63 lines
1.6 KiB
INI
# imx31 config
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#
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reset_config trst_and_srst srst_gates_jtag
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME imx31
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x07b3601d
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}
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if { [info exists SDMATAPID ] } {
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set _SDMATAPID $SDMATAPID
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} else {
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set _SDMATAPID 0x2190101d
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}
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if { [info exists ETBTAPID ] } {
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set _ETBTAPID $ETBTAPID
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} else {
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set _ETBTAPID 0x2b900f0f
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}
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#========================================
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jtag newtap $_CHIPNAME etb -irlen 4 -irmask 0xf -expected-id $_ETBTAPID
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# The "SDMA" - <S>mart <DMA> controller debug tap
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# Based on some IO pins - this can be disabled & removed
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# See diagram: 6-14
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# SIGNAL NAME:
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# SJC_MOD - controls multiplexer - disables ARM1136
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# SDMA_BYPASS - disables SDMA -
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#
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# Per ARM: DDI0211J_arm1136_r1p5_trm.pdf - the ARM 1136 as a 5 bit IR register
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jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
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# No IDCODE for this TAP
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jtag newtap $_CHIPNAME whatchacallit -irlen 4 -ircapture 0 -irmask 0xf -expected-id 0x0
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# Per section 40.17.1, table 40-85 the IR register is 4 bits
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# But this conflicts with Diagram 6-13, "3bits ir and drs"
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jtag newtap $_CHIPNAME smda -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_SDMATAPID
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME arm11 -endian $_ENDIAN -chain-position $_TARGETNAME
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proc power_restore {} { puts "Sensed power restore. No action." }
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proc srst_deasserted {} { puts "Sensed nSRST deasserted. No action." }
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