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git://git.code.sf.net/p/openocd/code
synced 2025-07-19 05:55:41 +10:00
The semantics of "-work-area-virt 0" (or phys) changed with the patch to require specifying physical or virtrual work area addresses. Specifying zero was previously a NOP. Now it means that address zero is valid. This patch addresses three related issues: - MMU-less processors should never specify work-area-virt; remove those specifications. Such processors include ARM7TDMI, Cortex-M3, and ARM966. - MMU-equipped processors *can* specify work-area-virt... but zero won't be appropriate, except in mischievous contexts (which hide null pointer exceptions). Remove those specs from those processors too. If any of those mappings is valid, someone will need to submit a patch adding it ... along with a comment saying what OS provides the mapping, and in which context. Example, say "works with Linux 2.6.30+, in kernel mode". (Note that ARM Linux doesn't map kernel memory to zero ...) - Clarify docs on that "-virt" and other work area stuff. Seems to me work-area-virt is quite problematic; not every operating system provides such static mappings; if they do, they're not in every MMU context... Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
52 lines
1.2 KiB
INI
52 lines
1.2 KiB
INI
#STR750 CPU
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME str750
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x4f1f0041
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}
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# jtag speed
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jtag_khz 10
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#use combined on interfaces or targets that can't set TRST/SRST separately
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#reset_config trst_and_srst srst_pulls_trst
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reset_config trst_and_srst srst_pulls_trst
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#jtag scan chain
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID
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#jtag nTRST and nSRST delay
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jtag_nsrst_delay 500
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jtag_ntrst_delay 500
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME arm7tdmi -endian little -chain-position 0 -variant arm7tdmi
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$_TARGETNAME configure -event reset-start { jtag_khz 10 }
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$_TARGETNAME configure -event reset-init { jtag_khz 3000 }
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$_TARGETNAME configure -event gdb-flash-erase-start {
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flash protect 0 0 7 off
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flash protect 1 0 1 off
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}
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$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0
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#flash bank <driver> <base> <size> <chip_width> <bus_width>
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flash bank str7x 0x20000000 0x00040000 0 0 0 STR75x
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flash bank str7x 0x200C0000 0x00004000 0 0 0 STR75x
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