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openocd/tcl/interface/ftdi/pipistrello.cfg
Robert Jordens fd6986168a pipistrello: decrease jtag speed to 10 MHz
30 MHz is not working reliably here

Change-Id: I38f5f8c7153fc64e313ee911b1629fb5f1114c39
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/4242
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-03-07 23:42:01 +00:00

14 lines
489 B
INI

# http://pipistrello.saanlima.com/
# http://www.saanlima.com/download/pipistrello-v2.0/pipistrello_v2_schematic.pdf
interface ftdi
ftdi_device_desc "Pipistrello LX45"
ftdi_vid_pid 0x0403 0x6010
# interface 1 is the uart
ftdi_channel 0
# just TCK TDI TDO TMS, no reset
ftdi_layout_init 0x0008 0x000b
reset_config none
# this generally works fast: the fpga can handle 30MHz, the spi flash can handle
# 54MHz with simple read, no dummy cycles, and wait-for-write-completion
adapter_khz 10000