mirror of
git://git.code.sf.net/p/openocd/code
synced 2025-07-19 13:02:18 +10:00
The reset-init hook for this target speeds up the CPU clock and JTAG adapter speed. When the target is reset running with high adapter speed, a series of warnings "DAP transaction stalled (WAIT) - slowing down" will be generated since the adapter speed is not reduced to fit the slower CPU speed. Fix: reduction of the adapter speed before a reset is performed. Change-Id: Iabfc8e3f70311e0e71c8eed09b8a37fcbed9c58d Signed-off-by: Alexander Kurz <akurz@blala.de> Reviewed-on: http://openocd.zylin.com/3365 Tested-by: jenkins Reviewed-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> |
||
---|---|---|
.. | ||
board | ||
chip | ||
cpld | ||
cpu/arm | ||
fpga | ||
interface | ||
target | ||
test | ||
tools | ||
bitsbytes.tcl | ||
mem_helper.tcl | ||
memory.tcl | ||
mmr_helpers.tcl |