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5a2608bbbc
Active watchdog forces reset during armv7m_checksum_memory() in verify_image command if run just after reset init. COP watchdog in KL series and WDOG32 in KE1 series have longer timeout however they need to be disabled too. The change extends 'kinetis disable_wdog' command to optionally probe the chip and use appropriate algorithm to disable watchdog. Setting of cache type is also split from flash_support flags. Tcl command 'kinetis disable_wdog' is called in reset-init event. Change-Id: I3191e230f38b679ed74f2a97fe323ef8fb3fe22e Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/3901 Tested-by: jenkins Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
82 lines
2.5 KiB
ArmAsm
82 lines
2.5 KiB
ArmAsm
/***************************************************************************
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* Copyright (C) 2017 Tomas Vanek *
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* vanekt@fbl.cz *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, write to the *
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* Free Software Foundation, Inc. *
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***************************************************************************/
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/*
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Disable watchdog, 32-bit version for newer Kinetis
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Parameters:
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r0 ... WDOG32 base (in)
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Used instruction set should work on both Cortex-M4 and M0+
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*/
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.text
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.syntax unified
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.cpu cortex-m0
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.thumb
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/* WDOG registers offsets */
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WDOG_CS = 0
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WDOG_CNT = 4
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WDOG_TOVAL = 8
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WDOG_KEY = 0xd928c520
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.thumb_func
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start:
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/* test WDOG_CS bit CMD32EN */
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ldr r2, [r0, WDOG_CS]
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ldr r3, =0x2000
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tst r2, r3
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ldr r3, =WDOG_KEY
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beq cmd16
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/* WDOG_CNT = key */
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str r3, [r0, WDOG_CNT]
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b unlocked
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cmd16:
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/* WDOG_CNT = key, halfword by halfword */
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strh r3, [r0, WDOG_CNT]
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lsrs r3, r3, #16
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strh r3, [r0, WDOG_CNT]
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/* WDOG_CS: clear EN bit 7, set UPDATE bit 5 */
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unlocked:
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movs r4, #0x80
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bics r2, r4
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movs r4, #0x20
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orrs r2, r4
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str r2, [r0, WDOG_CS]
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/* All active WDOG registers have to be updated, set dummy timeout */
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/* WDOG_TOVAL = 0x400 */
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ldr r3, =0x400
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str r3, [r0, WDOG_TOVAL]
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/* OpenOCD checks exit point address. Jump to the very end. */
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b done
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.pool
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/* Avoid padding at .text segment end. Otherwise exit point check fails. */
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.skip ( . - start + 2) & 2, 0
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done:
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bkpt #0
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.end
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