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c7384117c6
This should allow to share common configs for both regular access and high-level adapters. Use the newly-added functionality in stlink and icdi drivers, amend the configs accordingly. Runtime-tested with a TI tm4c123g board. Change-Id: Ibb88266a4ca25f06f6c073e916c963f017447bad Signed-off-by: Paul Fertser <fercerpav@gmail.com> [gus@projectgus.com: context-specific deprecation warnings] Signed-off-by: Angus Gratton <gus@projectgus.com> [andrew.smirnov@gmail.com: additional nrf51.cfg mods] Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Tested-by: Andrey Skvortsov <andrej.skvortzov@gmail.com> Reviewed-on: http://openocd.zylin.com/1664 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
101 lines
2.1 KiB
INI
101 lines
2.1 KiB
INI
# script for stm32l
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#
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# stm32 devices support both JTAG and SWD transports.
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#
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source [find target/swj-dp.tcl]
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME stm32l
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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# Work-area is a space in RAM used for flash programming
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# By default use 10kB
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if { [info exists WORKAREASIZE] } {
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set _WORKAREASIZE $WORKAREASIZE
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} else {
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set _WORKAREASIZE 0x2800
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}
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# JTAG speed should be <= F_CPU/6.
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# F_CPU after reset is 2MHz, so use F_JTAG max = 333kHz
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adapter_khz 300
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adapter_nsrst_delay 100
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if {[using_jtag]} {
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jtag_ntrst_delay 100
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}
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#jtag scan chain
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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if { [using_jtag] } {
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# See STM Document RM0038
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# Section 24.6.3
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set _CPUTAPID 0x4ba00477
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} {
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set _CPUTAPID 0x2ba01477
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}
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}
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swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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if { [info exists BSTAPID] } {
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# FIXME this never gets used to override defaults...
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set _BSTAPID $BSTAPID
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} else {
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# See STM Document RM0038
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# Section 24.6.2
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set _BSTAPID 0x06416041
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}
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if {[using_jtag]} {
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swj_newdap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID
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}
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
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# flash size will be probed
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME stm32lx 0x08000000 0 0 0 $_TARGETNAME
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if {![using_hla]} {
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# if srst is not fitted use SYSRESETREQ to
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# perform a soft reset
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cortex_m reset_config sysresetreq
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}
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proc stm32l_enable_HSI {} {
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# Enable HSI as clock source
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echo "STM32L: Enabling HSI"
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# Set HSION in RCC_CR
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mww 0x40023800 0x00000101
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# Set HSI as SYSCLK
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mww 0x40023808 0x00000001
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# Increase JTAG speed
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adapter_khz 2000
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}
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$_TARGETNAME configure -event reset-init {
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stm32l_enable_HSI
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}
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$_TARGETNAME configure -event reset-start {
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adapter_khz 300
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}
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