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It's Cortex-Xn, not Cortex Xn or cortex xn or cortex-xn or CORTEX-Xn or CortexXn. Further it's Cortex-M0+, not M0plus. Cf. http://www.arm.com/products/processors/index.php Consistently write it the official way, so that it stops propagating. Originally spotted in the documentation, it mainly affects code comments but also Atmel SAM3/SAM4/SAMV, NiietCM4 and SiM3x flash driver output. Found via: git grep -i "Cortex " git grep -i "Cortex-" | grep -v "Cortex-" | grep -v ".cpu" git grep -i "CortexM" Change-Id: Ic7b6ca85253e027f6f0f751c628d1a2a391fe914 Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-on: http://openocd.zylin.com/3483 Tested-by: jenkins Reviewed-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
48 lines
1.2 KiB
INI
48 lines
1.2 KiB
INI
# Freescale i.MX51
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME imx51
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}
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# CoreSight Debug Access Port
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if { [info exists DAP_TAPID] } {
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set _DAP_TAPID $DAP_TAPID
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} else {
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set _DAP_TAPID 0x1ba00477
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}
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jtag newtap $_CHIPNAME DAP -irlen 4 -ircapture 0x1 -irmask 0xf \
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-expected-id $_DAP_TAPID
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# SDMA / no IDCODE
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jtag newtap $_CHIPNAME SDMA -irlen 4 -ircapture 0x0 -irmask 0xf
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# SJC
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if { [info exists SJC_TAPID] } {
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set _SJC_TAPID SJC_TAPID
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} else {
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set _SJC_TAPID 0x0190c01d
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}
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jtag newtap $_CHIPNAME SJC -irlen 5 -ircapture 0x1 -irmask 0x1f \
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-expected-id $_SJC_TAPID -ignore-version
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# GDB target: Cortex-A8, using DAP
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_a -chain-position $_CHIPNAME.DAP
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# some TCK tycles are required to activate the DEBUG power domain
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jtag configure $_CHIPNAME.SJC -event post-reset "runtest 100"
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# have the DAP "always" be active
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jtag configure $_CHIPNAME.SJC -event setup "jtag tapenable $_CHIPNAME.DAP"
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proc imx51_dbginit {target} {
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# General Cortex-A8 debug initialisation
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cortex_a dbginit
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}
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$_TARGETNAME configure -event reset-assert-post "imx51_dbginit $_TARGETNAME"
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