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git://git.code.sf.net/p/openocd/code
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7c6d446440
Change-Id: Ie520e761c255ba1335d5aab9c6825f160a6151d9 Signed-off-by: Daniel Anselmi <danselmi@gmx.ch> Reviewed-on: https://review.openocd.org/c/openocd/+/7288 Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
25 lines
744 B
INI
25 lines
744 B
INI
# SPDX-License-Identifier: GPL-2.0-or-later
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# Trion® T20 BGA256 Development Kit
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# https://www.efinixinc.com/docs/trion20-devkit-ug-v1.5.pdf
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#
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# works after power cycle or pushing sw1.
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# it is because we cannot control CDONE which is connected to ftdi channel 0
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# note from an006: For JTAG programming, T4, T8, T13, and T20 FPGAs use the
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# CRESET_N and SS_N pins in addition to the standard JTAG pins.
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adapter driver ftdi
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ftdi vid_pid 0x0403 0x6010
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ftdi channel 1
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ftdi layout_init 0x0008 0x008b
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reset_config none
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transport select jtag
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adapter speed 6000
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source [find fpga/efinix_trion.cfg]
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#openocd -f board/trion_t20_bga256.cfg -c "init" -c "pld load 0 outflow/trion_blinker.bit"
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#ipdbg -start -tap trion.tap -hub 0x8 -port 5555 -tool 0
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