mirror of
git://git.code.sf.net/p/openocd/code
synced 2025-07-20 19:02:49 +10:00
3e6f9e8d1e
The semantics of "-work-area-virt 0" (or phys) changed with the patch to require specifying physical or virtrual work area addresses. Specifying zero was previously a NOP. Now it means that address zero is valid. This patch addresses three related issues: - MMU-less processors should never specify work-area-virt; remove those specifications. Such processors include ARM7TDMI, Cortex-M3, and ARM966. - MMU-equipped processors *can* specify work-area-virt... but zero won't be appropriate, except in mischievous contexts (which hide null pointer exceptions). Remove those specs from those processors too. If any of those mappings is valid, someone will need to submit a patch adding it ... along with a comment saying what OS provides the mapping, and in which context. Example, say "works with Linux 2.6.30+, in kernel mode". (Note that ARM Linux doesn't map kernel memory to zero ...) - Clarify docs on that "-virt" and other work area stuff. Seems to me work-area-virt is quite problematic; not every operating system provides such static mappings; if they do, they're not in every MMU context... Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
88 lines
2.4 KiB
INI
88 lines
2.4 KiB
INI
#Written by: Michael Schwingen <rincewind@discworld.dascon.de>
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME xba_reva3
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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# default to big endian
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set _ENDIAN big
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}
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if { [info exists CPUTAPID ] } {
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set _CPUTAPID $CPUTAPID
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} else {
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# force an error till we get a good number
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set _CPUTAPID 0xffffffff
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}
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reset_config trst_and_srst separate
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jtag_nsrst_delay 100
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jtag_ntrst_delay 100
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#jtag scan chain
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jtag newtap $_CHIPNAME cpu -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_CPUTAPID
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME -variant ixp42x
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$_TARGETNAME configure -event reset-init {
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#############################################################################
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# setup expansion bus CS, disable external wdt
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#############################################################################
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mww 0xc4000000 0xbd113842 #CS0 : Flash, write enabled @0x50000000
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mww 0xc4000004 0x94d10013 #CS1
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mww 0xc4000008 0x95960003 #CS2
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mww 0xc400000c 0x00000000 #CS3
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mww 0xc4000010 0x80900003 #CS4
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mww 0xc4000014 0x9d520003 #CS5
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mww 0xc4000018 0x81860001 #CS6
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mww 0xc400001c 0x80900003 #CS7
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#############################################################################
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# init SDRAM controller: 16MB, one bank, CL3
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#############################################################################
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mww 0xCC000000 0x2A # SDRAM_CFG: 64MBit, CL3
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mww 0xCC000004 0 # disable refresh
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mww 0xCC000008 3 # NOP
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sleep 100
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mww 0xCC000004 2100 # set refresh counter
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mww 0xCC000008 2 # Precharge All Banks
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sleep 100
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mww 0xCC000008 4 # Auto Refresh
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mww 0xCC000008 4 # Auto Refresh
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mww 0xCC000008 4 # Auto Refresh
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mww 0xCC000008 4 # Auto Refresh
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mww 0xCC000008 4 # Auto Refresh
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mww 0xCC000008 4 # Auto Refresh
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mww 0xCC000008 4 # Auto Refresh
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mww 0xCC000008 4 # Auto Refresh
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mww 0xCC000008 1 # Mode Select CL3
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#mww 0xc4000020 0xffffee # CFG0: remove expansion bus boot flash
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#mirror at 0x00000000
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#big endian
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reg XSCALE_CTRL 0xF8
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#
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# detect flash
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#
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flash probe 0
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}
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$_TARGETNAME configure -work-area-phys 0x20010000 -work-area-size 0x8060 -work-area-backup 0
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flash bank cfi 0x50000000 0x400000 2 2 $_TARGETNAME
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init
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reset init
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# set big endian mode
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reg XSCALE_CTRL 0xF8
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