mirror of
git://git.code.sf.net/p/openocd/code
synced 2025-07-19 08:38:14 +10:00
d8042fbb46
Replace the BSD-3-Clause boilerplate with the SPDX tag. Add the SPDX tag and the copyright to two makefiles that were added by TI with the other files in their respective folder. The SPDX tag on files *.c is incorrect, as it should use the C99 single line comment using '//'. But current checkpatch doesn't allow C99 comments, so keep using standard C comments, by now. Change-Id: I3ad1b2dbdb6054b74dcc26e394c9223ba0427caf Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/7158 Tested-by: jenkins
447 lines
11 KiB
C
447 lines
11 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause */
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/******************************************************************************
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*
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* Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
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*
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******************************************************************************/
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#include <stdint.h>
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#include <stdbool.h>
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#include "driverlib.h"
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/*
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* Wrapper function for the CPSID instruction.
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* Returns the state of PRIMASK on entry.
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*/
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uint32_t __attribute__((naked)) cpu_cpsid(void)
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{
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uint32_t ret;
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/* Read PRIMASK and disable interrupts. */
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__asm(" mrs r0, PRIMASK\n"
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" cpsid i\n"
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" bx lr\n"
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: "=r" (ret));
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/*
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* The return is handled in the inline assembly, but the compiler will
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* still complain if there is not an explicit return here (despite the fact
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* that this does not result in any code being produced because of the
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* naked attribute).
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*/
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return ret;
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}
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/* Wrapper function for the CPUWFI instruction. */
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void __attribute__((naked)) cpu_wfi(void)
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{
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/* Wait for the next interrupt. */
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__asm(" wfi\n"
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" bx lr\n");
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}
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/* Power Control Module APIs */
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#if defined(PCM)
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static bool __pcm_set_core_voltage_level_advanced(uint_fast8_t voltage_level,
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uint32_t time_out, bool blocking)
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{
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uint8_t power_mode;
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uint8_t current_voltage_level;
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uint32_t reg_value;
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bool bool_timeout;
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/* Getting current power mode and level */
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power_mode = pcm_get_power_mode();
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current_voltage_level = pcm_get_core_voltage_level();
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bool_timeout = time_out > 0 ? true : false;
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/* If we are already at the power mode they requested, return */
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if (current_voltage_level == voltage_level)
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return true;
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while (current_voltage_level != voltage_level) {
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reg_value = PCM->CTL0;
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switch (pcm_get_power_state()) {
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case PCM_AM_LF_VCORE1:
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case PCM_AM_DCDC_VCORE1:
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case PCM_AM_LDO_VCORE0:
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PCM->CTL0 = (PCM_KEY | (PCM_AM_LDO_VCORE1)
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| (reg_value & ~(PCM_CTL0_KEY_MASK | PCM_CTL0_AMR_MASK)));
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break;
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case PCM_AM_LF_VCORE0:
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case PCM_AM_DCDC_VCORE0:
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case PCM_AM_LDO_VCORE1:
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PCM->CTL0 = (PCM_KEY | (PCM_AM_LDO_VCORE0)
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| (reg_value & ~(PCM_CTL0_KEY_MASK | PCM_CTL0_AMR_MASK)));
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break;
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default:
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break;
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}
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if (blocking) {
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while (BITBAND_PERI(PCM->CTL1, PCM_CTL1_PMR_BUSY_OFS)) {
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if (bool_timeout && !(--time_out))
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return false;
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}
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} else
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return true;
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current_voltage_level = pcm_get_core_voltage_level();
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}
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/* Changing the power mode if we are stuck in LDO mode */
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if (power_mode != pcm_get_power_mode()) {
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if (power_mode == PCM_DCDC_MODE)
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return pcm_set_power_mode(PCM_DCDC_MODE);
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else
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return pcm_set_power_mode(PCM_LF_MODE);
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}
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return true;
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}
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bool pcm_set_core_voltage_level(uint_fast8_t voltage_level)
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{
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return __pcm_set_core_voltage_level_advanced(voltage_level, 0, true);
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}
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uint8_t pcm_get_power_mode(void)
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{
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uint8_t current_power_state;
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current_power_state = pcm_get_power_state();
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switch (current_power_state) {
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case PCM_AM_LDO_VCORE0:
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case PCM_AM_LDO_VCORE1:
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case PCM_LPM0_LDO_VCORE0:
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case PCM_LPM0_LDO_VCORE1:
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default:
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return PCM_LDO_MODE;
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case PCM_AM_DCDC_VCORE0:
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case PCM_AM_DCDC_VCORE1:
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case PCM_LPM0_DCDC_VCORE0:
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case PCM_LPM0_DCDC_VCORE1:
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return PCM_DCDC_MODE;
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case PCM_LPM0_LF_VCORE0:
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case PCM_LPM0_LF_VCORE1:
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case PCM_AM_LF_VCORE1:
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case PCM_AM_LF_VCORE0:
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return PCM_LF_MODE;
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}
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}
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uint8_t pcm_get_core_voltage_level(void)
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{
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uint8_t current_power_state = pcm_get_power_state();
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switch (current_power_state) {
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case PCM_AM_LDO_VCORE0:
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case PCM_AM_DCDC_VCORE0:
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case PCM_AM_LF_VCORE0:
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case PCM_LPM0_LDO_VCORE0:
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case PCM_LPM0_DCDC_VCORE0:
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case PCM_LPM0_LF_VCORE0:
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default:
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return PCM_VCORE0;
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case PCM_AM_LDO_VCORE1:
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case PCM_AM_DCDC_VCORE1:
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case PCM_AM_LF_VCORE1:
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case PCM_LPM0_LDO_VCORE1:
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case PCM_LPM0_DCDC_VCORE1:
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case PCM_LPM0_LF_VCORE1:
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return PCM_VCORE1;
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case PCM_LPM3:
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return PCM_VCORELPM3;
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}
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}
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static bool __pcm_set_power_mode_advanced(uint_fast8_t power_mode,
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uint32_t time_out, bool blocking)
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{
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uint8_t current_power_mode;
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uint8_t current_power_state;
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uint32_t reg_value;
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bool bool_timeout;
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/* Getting Current Power Mode */
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current_power_mode = pcm_get_power_mode();
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/* If the power mode being set it the same as the current mode, return */
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if (power_mode == current_power_mode)
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return true;
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current_power_state = pcm_get_power_state();
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bool_timeout = time_out > 0 ? true : false;
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/* Go through the while loop while we haven't achieved the power mode */
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while (current_power_mode != power_mode) {
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reg_value = PCM->CTL0;
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switch (current_power_state) {
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case PCM_AM_DCDC_VCORE0:
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case PCM_AM_LF_VCORE0:
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PCM->CTL0 = (PCM_KEY | PCM_AM_LDO_VCORE0
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| (reg_value & ~(PCM_CTL0_KEY_MASK | PCM_CTL0_AMR_MASK)));
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break;
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case PCM_AM_LF_VCORE1:
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case PCM_AM_DCDC_VCORE1:
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PCM->CTL0 = (PCM_KEY | PCM_AM_LDO_VCORE1
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| (reg_value & ~(PCM_CTL0_KEY_MASK | PCM_CTL0_AMR_MASK)));
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break;
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case PCM_AM_LDO_VCORE1: {
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if (power_mode == PCM_DCDC_MODE) {
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PCM->CTL0 = (PCM_KEY | PCM_AM_DCDC_VCORE1
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| (reg_value & ~(PCM_CTL0_KEY_MASK
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| PCM_CTL0_AMR_MASK)));
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} else if (power_mode == PCM_LF_MODE) {
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PCM->CTL0 = (PCM_KEY | PCM_AM_LF_VCORE1
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| (reg_value & ~(PCM_CTL0_KEY_MASK
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| PCM_CTL0_AMR_MASK)));
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} else
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return false;
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break;
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}
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case PCM_AM_LDO_VCORE0: {
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if (power_mode == PCM_DCDC_MODE) {
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PCM->CTL0 = (PCM_KEY | PCM_AM_DCDC_VCORE0
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| (reg_value & ~(PCM_CTL0_KEY_MASK
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| PCM_CTL0_AMR_MASK)));
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} else if (power_mode == PCM_LF_MODE) {
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PCM->CTL0 = (PCM_KEY | PCM_AM_LF_VCORE0
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| (reg_value & ~(PCM_CTL0_KEY_MASK
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| PCM_CTL0_AMR_MASK)));
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} else
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return false;
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break;
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}
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default:
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break;
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}
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if (blocking) {
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while (BITBAND_PERI(PCM->CTL1, PCM_CTL1_PMR_BUSY_OFS)) {
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if (bool_timeout && !(--time_out))
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return false;
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}
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} else
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return true;
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current_power_mode = pcm_get_power_mode();
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current_power_state = pcm_get_power_state();
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}
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return true;
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}
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bool pcm_set_power_mode(uint_fast8_t power_mode)
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{
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return __pcm_set_power_mode_advanced(power_mode, 0, true);
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}
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static bool __pcm_set_power_state_advanced(uint_fast8_t power_state,
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uint32_t timeout, bool blocking)
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{
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uint8_t current_power_state;
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current_power_state = pcm_get_power_state();
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if (current_power_state == power_state)
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return true;
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switch (power_state) {
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case PCM_AM_LDO_VCORE0:
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return __pcm_set_core_voltage_level_advanced(PCM_VCORE0, timeout,
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blocking) && __pcm_set_power_mode_advanced(PCM_LDO_MODE,
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timeout, blocking);
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case PCM_AM_LDO_VCORE1:
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return __pcm_set_core_voltage_level_advanced(PCM_VCORE1, timeout,
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blocking) && __pcm_set_power_mode_advanced(PCM_LDO_MODE,
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timeout, blocking);
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case PCM_AM_DCDC_VCORE0:
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return __pcm_set_core_voltage_level_advanced(PCM_VCORE0, timeout,
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blocking) && __pcm_set_power_mode_advanced(PCM_DCDC_MODE,
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timeout, blocking);
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case PCM_AM_DCDC_VCORE1:
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return __pcm_set_core_voltage_level_advanced(PCM_VCORE1, timeout,
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blocking) && __pcm_set_power_mode_advanced(PCM_DCDC_MODE,
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timeout, blocking);
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case PCM_AM_LF_VCORE0:
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return __pcm_set_core_voltage_level_advanced(PCM_VCORE0, timeout,
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blocking) && __pcm_set_power_mode_advanced(PCM_LF_MODE,
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timeout, blocking);
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case PCM_AM_LF_VCORE1:
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return __pcm_set_core_voltage_level_advanced(PCM_VCORE1, timeout,
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blocking) && __pcm_set_power_mode_advanced(PCM_LF_MODE,
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timeout, blocking);
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case PCM_LPM0_LDO_VCORE0:
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if (!__pcm_set_core_voltage_level_advanced(PCM_VCORE0, timeout,
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blocking) || !__pcm_set_power_mode_advanced(PCM_LDO_MODE,
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timeout, blocking))
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break;
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return pcm_goto_lpm0();
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case PCM_LPM0_LDO_VCORE1:
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if (!__pcm_set_core_voltage_level_advanced(PCM_VCORE1, timeout,
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blocking) || !__pcm_set_power_mode_advanced(PCM_LDO_MODE,
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timeout, blocking))
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break;
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return pcm_goto_lpm0();
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case PCM_LPM0_DCDC_VCORE0:
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if (!__pcm_set_core_voltage_level_advanced(PCM_VCORE0, timeout,
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blocking) || !__pcm_set_power_mode_advanced(PCM_DCDC_MODE,
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timeout, blocking))
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break;
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return pcm_goto_lpm0();
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case PCM_LPM0_DCDC_VCORE1:
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if (!__pcm_set_core_voltage_level_advanced(PCM_VCORE1, timeout,
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blocking) || !__pcm_set_power_mode_advanced(PCM_DCDC_MODE,
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timeout, blocking))
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break;
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return pcm_goto_lpm0();
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case PCM_LPM0_LF_VCORE0:
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if (!__pcm_set_core_voltage_level_advanced(PCM_VCORE0, timeout,
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blocking) || !__pcm_set_power_mode_advanced(PCM_LF_MODE,
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timeout, blocking))
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break;
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return pcm_goto_lpm0();
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case PCM_LPM0_LF_VCORE1:
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if (!__pcm_set_core_voltage_level_advanced(PCM_VCORE1, timeout,
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blocking) || !__pcm_set_power_mode_advanced(PCM_LF_MODE,
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timeout, blocking))
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break;
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return pcm_goto_lpm0();
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case PCM_LPM3:
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return pcm_goto_lpm3();
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case PCM_LPM4:
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return pcm_goto_lpm4();
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case PCM_LPM45:
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return pcm_shutdown_device(PCM_LPM45);
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case PCM_LPM35_VCORE0:
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return pcm_shutdown_device(PCM_LPM35_VCORE0);
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default:
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return false;
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}
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return false;
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}
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bool pcm_set_power_state(uint_fast8_t power_state)
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{
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return __pcm_set_power_state_advanced(power_state, 0, true);
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}
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bool pcm_shutdown_device(uint32_t shutdown_mode)
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{
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uint32_t shutdown_mode_bits = (shutdown_mode == PCM_LPM45) ?
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PCM_CTL0_LPMR_12 : PCM_CTL0_LPMR_10;
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/* If a power transition is occurring, return false */
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if (BITBAND_PERI(PCM->CTL1, PCM_CTL1_PMR_BUSY_OFS))
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return false;
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/* Initiating the shutdown */
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SCB->SCR |= SCB_SCR_SLEEPDEEP_MSK;
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PCM->CTL0 = (PCM_KEY | shutdown_mode_bits
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| (PCM->CTL0 & ~(PCM_CTL0_KEY_MASK | PCM_CTL0_LPMR_MASK)));
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cpu_wfi();
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return true;
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}
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bool pcm_goto_lpm4(void)
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{
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/* Disabling RTC_C and WDT_A */
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wdt_a_hold_timer();
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rtc_c_hold_clock();
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/* LPM4 is just LPM3 with WDT_A/RTC_C disabled... */
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return pcm_goto_lpm3();
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}
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bool pcm_goto_lpm0(void)
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{
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/* If we are in the middle of a state transition, return false */
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if (BITBAND_PERI(PCM->CTL1, PCM_CTL1_PMR_BUSY_OFS))
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return false;
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SCB->SCR &= ~SCB_SCR_SLEEPDEEP_MSK;
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cpu_wfi();
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return true;
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}
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bool pcm_goto_lpm3(void)
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{
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uint_fast8_t current_power_state;
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uint_fast8_t current_power_mode;
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/* If we are in the middle of a state transition, return false */
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if (BITBAND_PERI(PCM->CTL1, PCM_CTL1_PMR_BUSY_OFS))
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return false;
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/* If we are in the middle of a shutdown, return false */
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if ((PCM->CTL0 & PCM_CTL0_LPMR_MASK) == PCM_CTL0_LPMR_10
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|| (PCM->CTL0 & PCM_CTL0_LPMR_MASK) == PCM_CTL0_LPMR_12)
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return false;
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current_power_mode = pcm_get_power_mode();
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current_power_state = pcm_get_power_state();
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if (current_power_mode == PCM_DCDC_MODE)
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pcm_set_power_mode(PCM_LDO_MODE);
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/* Clearing the SDR */
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PCM->CTL0 =
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(PCM->CTL0 & ~(PCM_CTL0_KEY_MASK | PCM_CTL0_LPMR_MASK)) | PCM_KEY;
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/* Setting the sleep deep bit */
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SCB->SCR |= SCB_SCR_SLEEPDEEP_MSK;
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cpu_wfi();
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SCB->SCR &= ~SCB_SCR_SLEEPDEEP_MSK;
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return pcm_set_power_state(current_power_state);
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}
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uint8_t pcm_get_power_state(void)
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{
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return (PCM->CTL0 & PCM_CTL0_CPM_MASK) >> PCM_CTL0_CPM_OFS;
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}
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#endif
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/* Real Time Clock APIs */
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#if defined(RTC_C)
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void rtc_c_hold_clock(void)
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{
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RTC_C->CTL0 = (RTC_C->CTL0 & ~RTC_C_CTL0_KEY_MASK) | RTC_C_KEY;
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BITBAND_PERI(RTC_C->CTL13, RTC_C_CTL13_HOLD_OFS) = 1;
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BITBAND_PERI(RTC_C->CTL0, RTC_C_CTL0_KEY_OFS) = 0;
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}
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#endif
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/* Watch Dog Timer APIs */
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#if defined(WDT_A)
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void wdt_a_hold_timer(void)
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{
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/* Set Hold bit */
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uint8_t new_wdt_status = (WDT_A->CTL | WDT_A_CTL_HOLD);
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WDT_A->CTL = WDT_A_CTL_PW + new_wdt_status;
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}
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#endif
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