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With this commit we add tcl configure files for ARCv2 HS Development kit(HSDK). HSDK board has Quad-core ARC HS38 CPU with L1 and L2 caches. Change-Id: I372ef45428c7c7ca1421a6da3e5ed08b86f705e0 Signed-off-by: Evgeniy Didin <didin@synopsys.com> Reviewed-on: http://openocd.zylin.com/5784 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
19 lines
435 B
INI
19 lines
435 B
INI
# Copyright (C) 2020 Synopsys, Inc.
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# Anton Kolesov <anton.kolesov@synopsys.com>
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# Didin Evgeniy <didin@synopsys.com>
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#
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# SPDX-License-Identifier: GPL-2.0-or-later
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#
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# Synopsys SDP Mainboard has embdded FT2232 chip, which is similiar to Digilent
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# HS-1, except that it uses channel B for JTAG communication, instead of
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# channel A.
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#
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adapter driver ftdi
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ftdi_vid_pid 0x0403 0x6010
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ftdi_layout_init 0x0088 0x008b
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ftdi_channel 1
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