mirror of
git://git.code.sf.net/p/openocd/code
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dfbb9f3e89
from pre/post_reset event scripts. Adding the second parameter was a mistake seen in retrospect. this gives precise control in post_reset for *when* the post reset speed is set. The pre_reset event was added *after* the second parameter to jtag_khz/speed - the target implementations no longer gets involved in the reset mode scheme. Either they reset a target into a halted mode or not. target_process_reset() detects if the reset halt failed or not. - tcl target event names are now target_N_name. Mainly internal at this early stage, but best to get the naming right now. - added hardcoded reset modes from gdb_server.c. I don't know precisely what these defaults should be or if it should be made configurable. Perhaps some hardcoded defaults will do for now and it can be made configurable later. - bugfix in cortex_m3.c for reset_run_and_xxx? - issue syntax error upon obsolete argument in target command instead of printing message that will surely drown in the log git-svn-id: svn://svn.berlios.de/openocd/trunk@849 b42882b7-edfa-0310-969c-e2dbd0fdcd60
24 lines
579 B
Plaintext
24 lines
579 B
Plaintext
#
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# Init - taken form the script openocd_at91sam7_ecr.script
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#
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# I take this script from the following page:
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#
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# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/openocd_intro/index.html
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#
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# disable watchdog
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mww 0xfffffd44 0x00008000
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# enable user reset
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mww 0xfffffd08 0xa5000001
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# CKGR_MOR : enable the main oscillator
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mww 0xfffffc20 0x00000601
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sleep 10
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# CKGR_PLLR: 96.1097 MHz
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mww 0xfffffc2c 0x00481c0e
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sleep 10
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# PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
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mww 0xfffffc30 0x00000007
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sleep 10
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# MC_FMR: flash mode (FWS=1,FMCN=60)
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mww 0xffffff60 0x003c0100
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sleep 100
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