Nicolas Derumigny a192949095 jtag: drivers: xlnx-axi-xvc: Add support for Xilinx XVC over direct bus interface (AXI) ... This change allow to use direct mapping of the JTAG interface using Xilinx Virtual Cable (XVC) over AXI. This merges the existing XVC PCIe code and the patch proposed by Jeremy Garff (https://review.openocd.org/c/openocd/+/6594). This is useful when using on a Zynq/ZynqMP/uBlaze host with direct access to the debug bridge over AXI. You can then use the debug bridge Xilinx IP (AXIXVC) to debug a remote device. Signed-off-by: Nicolas Derumigny <nicolas.derumigny@inria.fr> Change-Id: I934591b489e30b400b87772b1437e6030440904c Reviewed-on: https://review.openocd.org/c/openocd/+/8595 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>		2025-07-25 16:38:41 +00:00
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manual
usb_adapters
.gitattributes
checkpatch.rst
fdl.texi
Makefile.am
openocd.1
openocd.texi	jtag: drivers: xlnx-axi-xvc: Add support for Xilinx XVC over direct bus interface (AXI)	2025-07-25 16:38:41 +00:00