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mirror of git://git.code.sf.net/p/openocd/code synced 2025-07-19 13:02:18 +10:00
openocd/tcl
Oleksij Rempel c8c7788825 target|board: Add Intel (Altera) Arria 10 target and related board
Target information about this SoC can be found here:
https://www.altera.com/products/fpga/arria-series/arria-10/overview.html

Achilles Instant-Development Kit Arria 10 SoC SoM:
https://www.reflexces.com/products-solutions/development-kits/arria-10/achilles-instant-development-kit-arria-10-soc-som

Change-Id: Id78c741be6a8b7d3a70f37d41088e47ee61b437a
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-on: http://openocd.zylin.com/4583
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2018-07-31 18:57:17 +01:00
..
board target|board: Add Intel (Altera) Arria 10 target and related board 2018-07-31 18:57:17 +01:00
chip
cpld xilinx-xcu: add Xilinx Ultrascale tap data 2018-03-30 10:07:49 +01:00
cpu/arm
fpga fpga/altera-10m50: add all device id 2018-07-31 18:56:14 +01:00
interface jtag/drivers: Add support for TI XDS110 debug probe 2018-05-31 13:25:16 +01:00
target target|board: Add Intel (Altera) Arria 10 target and related board 2018-07-31 18:57:17 +01:00
test
tools tcl/board: add Linksys WAG200G config 2016-10-17 09:16:33 +01:00
bitsbytes.tcl
mem_helper.tcl tcl: add mrb command to mem_helper.tcl 2016-07-17 22:36:47 +01:00
memory.tcl target: add "phys" argument to mem2array, array2mem 2016-08-09 14:32:12 +01:00
mmr_helpers.tcl