2
0
mirror of git://git.code.sf.net/p/openocd/code synced 2025-07-19 13:02:18 +10:00
openocd/tcl/target
Tarek BOCHKATI c9d40366ad flash/stm32l4x: STM32L5 support programming when TZEN=1 and RDP=0xAA
STM32L5 flash memory is aliased to 0x0C000000, this address mapping
is used for secure applications. (0x08000000 for non-secure)

this change allows the programming of secure and non-secure flash
when trustzone is enabled and RDP level is 0

Change-Id: I89d1f1b5d493cf01a142ca4dbfef5a3731cab96e
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5936
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-08-26 06:19:15 +00:00
..
infineon
marvell tcl: replace '-ctibase' with '-baseaddr' 2020-11-04 17:37:36 +00:00
1986ве1т.cfg
adsp-sc58x.cfg
aduc702x.cfg
aducm360.cfg
allwinner_v3s.cfg
alphascale_asm9260t.cfg
altera_fpgasoc_arria10.cfg
altera_fpgasoc.cfg
am335x.cfg tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:49:08 +01:00
am437x.cfg tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:49:08 +01:00
amdm37x.cfg
ampere_emag.cfg tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:48:44 +01:00
ar71xx.cfg
arm_corelink_sse200.cfg
armada370.cfg tcl/target/armada370: remove useless 'init' command 2020-08-02 10:49:09 +01:00
at32ap7000.cfg
at91r40008.cfg
at91rm9200.cfg
at91sam3ax_4x.cfg
at91sam3ax_8x.cfg
at91sam3ax_xx.cfg
at91sam3nXX.cfg
at91sam3sXX.cfg
at91sam3u1c.cfg
at91sam3u1e.cfg
at91sam3u2c.cfg
at91sam3u2e.cfg
at91sam3u4c.cfg
at91sam3u4e.cfg
at91sam3uxx.cfg
at91sam3XXX.cfg
at91sam4c32x.cfg
at91sam4cXXX.cfg
at91sam4lXX.cfg
at91sam4sd32x.cfg
at91sam4sXX.cfg
at91sam4XXX.cfg
at91sam7a2.cfg
at91sam7se512.cfg
at91sam7sx.cfg
at91sam7x256.cfg
at91sam7x512.cfg
at91sam9.cfg
at91sam9g10.cfg
at91sam9g20.cfg
at91sam9g45.cfg
at91sam9rl.cfg
at91sam9260_ext_RAM_ext_flash.cfg
at91sam9260.cfg
at91sam9261.cfg
at91sam9263.cfg
at91sama5d2.cfg add config for Microchip SAMA5D27 SOM1 Kit1 2021-08-14 08:04:38 +01:00
at91samdXX.cfg
at91samg5x.cfg
atheros_ar2313.cfg
atheros_ar2315.cfg
atheros_ar9331.cfg
atheros_ar9344.cfg
atmega128.cfg
atmega128rfa1.cfg
atsame5x.cfg
atsaml1x.cfg
atsamv.cfg
avr32.cfg
bcm47xx.cfg
bcm281xx.cfg
bcm2711.cfg tcl/target: add BCM2711 configuration file 2021-03-10 21:36:59 +00:00
bcm2835.cfg tcl/target: add BCM2835 configuration file 2021-03-10 21:36:45 +00:00
bcm2836.cfg tcl/target: add BCM2836 configuration file 2021-03-10 21:36:50 +00:00
bcm2837.cfg tcl/target: add BCM2837 configuration file 2021-03-10 21:36:54 +00:00
bcm4706.cfg
bcm4718.cfg
bcm5352e.cfg
bcm6348.cfg
bluefield.cfg tcl: replace '-ctibase' with '-baseaddr' 2020-11-04 17:37:36 +00:00
bluenrg-x.cfg tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:49:08 +01:00
c100.cfg
c100config.tcl tcl: fix some minor typo 2021-05-22 10:06:26 +01:00
c100helper.tcl tcl: fix some minor typo 2021-05-22 10:06:26 +01:00
c100regs.tcl tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:48:44 +01:00
cc2538.cfg
cs351x.cfg
davinci.cfg tcl: fix some minor typo 2021-05-22 10:06:26 +01:00
dragonite.cfg
dsp56321.cfg
dsp568013.cfg
dsp568037.cfg
efm32.cfg
em357.cfg tcl/target: use command 'jtag newtap' to add a boundary scan TAP 2020-09-05 17:10:14 +01:00
em358.cfg
eos_s3.cfg tcl/target/eos_s3: fix variable's expansion typo 2021-03-04 14:59:32 +00:00
epc9301.cfg
esi32xx.cfg
exynos5250.cfg
faux.cfg
feroceon.cfg
fm3.cfg
fm4_mb9bf.cfg tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:48:44 +01:00
fm4_s6e2cc.cfg tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:48:44 +01:00
fm4.cfg
gd32vf103.cfg tcl/target: Add initial GigaDevice GD32VF103 support 2020-07-26 20:11:28 +01:00
gp326xxxa.cfg
hi3798.cfg tcl: replace '-ctibase' with '-baseaddr' 2020-11-04 17:37:36 +00:00
hi6220.cfg tcl: replace '-ctibase' with '-baseaddr' 2020-11-04 17:37:36 +00:00
hilscher_netx10.cfg
hilscher_netx50.cfg
hilscher_netx500.cfg tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:49:08 +01:00
icepick.cfg tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:49:08 +01:00
imx6.cfg
imx6sx.cfg
imx6ul.cfg
imx7.cfg
imx7ulp.cfg
imx8m.cfg tcl: replace '-ctibase' with '-baseaddr' 2020-11-04 17:37:36 +00:00
imx8qm.cfg target/imx8qm: Initial support 2021-04-24 05:53:57 +01:00
imx21.cfg
imx25.cfg
imx27.cfg
imx28.cfg
imx31.cfg
imx35.cfg
imx51.cfg
imx53.cfg
imx.cfg tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:48:44 +01:00
is5114.cfg
ixp42x.cfg tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:48:44 +01:00
k40.cfg
k60.cfg
k1921vk01t.cfg
ke0x.cfg
ke1xf.cfg
ke1xz.cfg
kl25.cfg
kl46.cfg
klx.cfg
ks869x.cfg
kx.cfg
lpc1xxx.cfg
lpc2xxx.cfg
lpc8nxx.cfg tcl: fix some minor typo 2021-05-22 10:06:26 +01:00
lpc8xx.cfg
lpc11xx.cfg
lpc12xx.cfg
lpc13xx.cfg
lpc17xx.cfg
lpc40xx.cfg
lpc84x.cfg
lpc1850.cfg
lpc2103.cfg
lpc2124.cfg
lpc2129.cfg
lpc2148.cfg
lpc2294.cfg
lpc2378.cfg
lpc2460.cfg
lpc2478.cfg
lpc2900.cfg
lpc3131.cfg
lpc3250.cfg
lpc4350.cfg
lpc4357.cfg
lpc4370.cfg
ls1012a.cfg tcl: replace '-ctibase' with '-baseaddr' 2020-11-04 17:37:36 +00:00
max3263x.cfg
max32620.cfg
max32625.cfg
mc13224v.cfg
mdr32f9q2i.cfg
nds32v2.cfg
nds32v3.cfg
nds32v3m.cfg
nds32v5.cfg tcl: Add support for NDS V5 target and xc7/Corvette-F1 2020-08-16 11:48:53 +01:00
nhs31xx.cfg
nrf51.cfg
nrf52.cfg tcl/target/nrf52: fix nrf52_recover 2020-10-22 21:19:59 +01:00
nuc910.cfg
numicro.cfg
omap2420.cfg
omap3530.cfg
omap4430.cfg tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:48:44 +01:00
omap4460.cfg tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:48:44 +01:00
omap5912.cfg
omapl138.cfg
or1k.cfg tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:48:44 +01:00
pic32mx.cfg tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:48:44 +01:00
psoc4.cfg tcl: fix some minor typo 2021-05-22 10:06:26 +01:00
psoc5lp.cfg tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:48:44 +01:00
psoc6.cfg tcl/target: use command 'jtag newtap' to add a boundary scan TAP 2020-09-05 17:10:14 +01:00
pxa3xx.cfg
pxa255.cfg
pxa270.cfg
qualcomm_qca4531.cfg
quark_d20xx.cfg
quark_x10xx.cfg
readme.txt
renesas_r7s72100.cfg
renesas_rcar_gen2.cfg tcl/target: Select default boot core on Renesas R-Car Gen2/Gen3 2021-06-26 14:39:22 +01:00
renesas_rcar_gen3.cfg tcl/target: Add support for Renesas R8A779A0 V3U SoC 2021-06-26 14:39:30 +01:00
renesas_rcar_reset_common.cfg
renesas_rz_g2.cfg target/renesas_rz_g2: Introduce tcl config file for RZ/G2 devices 2021-06-04 17:43:57 +01:00
renesas_s7g2.cfg
rk3308.cfg tcl/target/rk3308.cfg: add defer-examine 2020-12-26 15:47:52 +00:00
rk3399.cfg tcl/target: add Rockchip RK3399 target 2021-03-10 21:29:26 +00:00
rp2040-core0.cfg tcl/rp2040: remove empty line at end of file 2021-05-22 10:06:01 +01:00
samsung_s3c2410.cfg
samsung_s3c2440.cfg
samsung_s3c2450.cfg
samsung_s3c4510.cfg
samsung_s3c6410.cfg
sharp_lh79532.cfg
sim3x.cfg
smp8634.cfg
snps_em_sk_fpga.cfg tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:48:44 +01:00
snps_hsdk.cfg tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:48:44 +01:00
spear3xx.cfg
stellaris.cfg tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:49:08 +01:00
stm8l152.cfg
stm8l.cfg stm8 target: make adapter speed settings work 2020-05-24 21:34:48 +01:00
stm8s003.cfg
stm8s103.cfg
stm8s105.cfg
stm8s.cfg stm8 target: make adapter speed settings work 2020-05-24 21:34:48 +01:00
stm32f0x.cfg
stm32f1x.cfg
stm32f2x.cfg
stm32f3x.cfg
stm32f4x.cfg tcl/target/stm32f4x: fix hardcoded chip name 2021-06-04 17:42:17 +01:00
stm32f7x.cfg Flash, FRAM and EEPROM driver for STM32 QUAD-/OCTOSPI interface 2020-11-08 22:46:00 +00:00
stm32g0x.cfg stm32l4x: add OTP support for STM32 G0/G4/L4/L4+/L5/WB/WL devices 2021-03-24 17:15:38 +00:00
stm32g4x.cfg stm32l4x: add OTP support for STM32 G0/G4/L4/L4+/L5/WB/WL devices 2021-03-24 17:15:38 +00:00
stm32h7x_dual_bank.cfg
stm32h7x.cfg tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:48:44 +01:00
stm32l0_dual_bank.cfg
stm32l0.cfg
stm32l1.cfg
stm32l1x_dual_bank.cfg
stm32l4x.cfg stm32l4x: add OTP support for STM32 G0/G4/L4/L4+/L5/WB/WL devices 2021-03-24 17:15:38 +00:00
stm32l5x.cfg flash/stm32l4x: STM32L5 support programming when TZEN=1 and RDP=0xAA 2021-08-26 06:19:15 +00:00
stm32mp15x.cfg tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:49:08 +01:00
stm32w108xx.cfg tcl/target: use command 'jtag newtap' to add a boundary scan TAP 2020-09-05 17:10:14 +01:00
stm32wbx.cfg stm32l4x: add OTP support for STM32 G0/G4/L4/L4+/L5/WB/WL devices 2021-03-24 17:15:38 +00:00
stm32wlx.cfg stm32l4x: add OTP support for STM32 G0/G4/L4/L4+/L5/WB/WL devices 2021-03-24 17:15:38 +00:00
stm32xl.cfg
str710.cfg
str730.cfg
str750.cfg
str912.cfg
swj-dp.tcl hla_transport: split command registration per transport 2020-09-05 17:10:38 +01:00
swm050.cfg
test_reset_syntax_error.cfg
test_syntax_error.cfg
ti_calypso.cfg
ti_cc13x0.cfg
ti_cc13x2.cfg
ti_cc26x0.cfg
ti_cc26x2.cfg
ti_cc32xx.cfg
ti_cc3220sf.cfg
ti_dm355.cfg tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:48:44 +01:00
ti_dm365.cfg tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:48:44 +01:00
ti_dm6446.cfg
ti_k3.cfg tcl/target: Add K3 basic support 2021-03-10 21:23:53 +00:00
ti_msp432.cfg
ti_rm4x.cfg
ti_tms570.cfg
ti_tms570ls20xxx.cfg
ti_tms570ls3137.cfg
ti-ar7.cfg
ti-cjtag.cfg
tmpa900.cfg
tmpa910.cfg
tnetc4401.cfg
u8500.cfg tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:49:08 +01:00
vybrid_vf6xx.cfg
xilinx_zynqmp.cfg target/zynqmp : Add AXI AP access port 2021-05-22 10:12:01 +01:00
xmc1xxx.cfg
xmc4xxx.cfg
xmos_xs1-xau8a-10_arm.cfg
zynq_7000.cfg
к1879xб1я.cfg

Prerequisites:
The users of OpenOCD as well as computer programs interacting with OpenOCD are expecting that certain commands
do the same thing across all the targets.

Rules to follow when writing scripts:

1. The configuration script should be defined such as , for example, the following sequences are working:
	reset
	flash info <bank>
and
	reset
	flash erase_address <start> <len>
and
	reset init
	load

In most cases this can be accomplished by specifying the default startup mode as reset_init (target command
in the configuration file).

2. If the target is correctly configured, flash must be writable without any other helper commands. It is
assumed that all write-protect mechanisms should be disabled.

3. The configuration scripts should be defined such as the binary that was written to flash verifies
(turn off remapping, checksums, etc...)

flash write_image [file] <parameters>
verify_image [file] <parameters>

4. adapter speed sets the maximum speed (or alternatively RCLK). If invoked
multiple times only the last setting is used.

interface/xxx.cfg files are always executed *before* target/xxx.cfg
files, so any adapter speed in interface/xxx.cfg will be overridden by
target/xxx.cfg. adapter speed in interface/xxx.cfg would then, effectively,
set the default JTAG speed.

Note that a target/xxx.cfg file can invoke another target/yyy.cfg file,
so one can create target subtype configurations where e.g. only
amount of DRAM, oscillator speeds differ and having a single
config file for the default/common settings.