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cb2f21bf36
Added configuration files and flash loaders. Change-Id: I768eb3626f4e0eadb206bef90a867cc146fe8c75 Signed-off-by: Michele Sardo <msmttchr@gmail.com> Reviewed-on: http://openocd.zylin.com/4226 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
74 lines
1.7 KiB
INI
74 lines
1.7 KiB
INI
#
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# bluenrg-1/2 devices support only SWD transports.
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#
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source [find target/swj-dp.tcl]
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME bluenrg-1
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}
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set _ENDIAN little
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# Work-area is a space in RAM used for flash programming
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# By default use 24kB-256bytes
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if { [info exists WORKAREASIZE] } {
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set _WORKAREASIZE $WORKAREASIZE
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} else {
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set _WORKAREASIZE 0x5F00
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}
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adapter_khz 4000
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x0bb11477
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}
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swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
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set _TARGETNAME $_CHIPNAME.cpu
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set WDOG_VALUE 0
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set WDOG_VALUE_SET 0
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target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
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$_TARGETNAME configure -work-area-phys 0x20000100 -work-area-size $_WORKAREASIZE -work-area-backup 0
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# flash size will be probed
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME bluenrg-x 0 0 0 0 $_TARGETNAME
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# In BlueNRG-X reset pin is actually a shutdown (power-off), so define reset as none
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reset_config none
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if {![using_hla]} {
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# if srst is not fitted use SYSRESETREQ to
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# perform a soft reset
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cortex_m reset_config sysresetreq
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}
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$_TARGETNAME configure -event halted {
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global WDOG_VALUE
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global WDOG_VALUE_SET
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# Stop watchdog during halt, if enabled
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mem2array value 32 0x40700008 1
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set WDOG_VALUE [expr ($value(0))]
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if [expr ($value(0) & (1 << 1))] {
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set WDOG_VALUE_SET 1
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mww 0x40700008 [expr ($value(0) & 0xFFFFFFFD)]
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}
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}
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$_TARGETNAME configure -event resumed {
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global WDOG_VALUE
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global WDOG_VALUE_SET
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if [expr $WDOG_VALUE_SET] {
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# Restore watchdog enable value after resume
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mww 0x40700008 $WDOG_VALUE
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set WDOG_VALUE_SET 0
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}
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}
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