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Added msp432 flash driver to support the TI MSP432P4x and MSP432E4x microcontrollers. Implemented the flash algo helper as used in the TI debug and flash tools. This implemention supports the MSP432E4, Falcon, and Falcon 2M variants. The flash driver automatically detects the connected variant and configures itself appropriately. Added command to mass erase device for consistency with TI tools and added command to unlock the protected BSL region. Tested using MSP432E401Y, MSP432P401R, and MSP432P4111 LaunchPads. Tested with embedded XDS110 debug probe in CMSIS-DAP mode and with external SEGGER J-Link probe. Removed ti_msp432p4xx.cfg file made obsolete by this patch. Change-Id: I3b29d39ccc492524ef2c4a1733f7f9942c2684c0 Signed-off-by: Edward Fewell <efewell@ti.com> Reviewed-on: http://openocd.zylin.com/4153 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
103 lines
3.9 KiB
C
103 lines
3.9 KiB
C
/******************************************************************************
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*
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* Copyright (C) 2012-2018 Texas Instruments Incorporated - http://www.ti.com/
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the
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* distribution.
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*
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* Neither the name of Texas Instruments Incorporated nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************/
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#ifndef OPENOCD_LOADERS_FLASH_MSP432_MSP432P401X_H
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#define OPENOCD_LOADERS_FLASH_MSP432_MSP432P401X_H
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#include <stdint.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define __MCU_HAS_FLCTL__ /* Module FLCTL is available */
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/* Device and peripheral memory map */
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#define FLASH_BASE ((uint32_t)0x00000000) /* Flash memory start address */
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#define SRAM_BASE ((uint32_t)0x20000000) /* SRAM memory start address */
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#define PERIPH_BASE ((uint32_t)0x40000000) /* Peripherals start address */
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#define CS_BASE (PERIPH_BASE + 0x00010400) /* Address of module CS regs. */
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#define DIO_BASE (PERIPH_BASE + 0x00004C00) /* Address of module DIO regs. */
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/* Register map for Clock Signal peripheral (CS) */
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struct cs {
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volatile uint32_t KEY; /* Key Register */
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volatile uint32_t CTL0; /* Control 0 Register */
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volatile uint32_t CTL1; /* Control 1 Register */
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volatile uint32_t CTL2; /* Control 2 Register */
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volatile uint32_t CTL3; /* Control 3 Register */
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};
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/* Register map for DIO port (odd interrupt) */
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struct dio_port_odd_int {
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volatile uint8_t IN; /* Port Input */
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uint8_t RESERVED0;
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volatile uint8_t OUT; /* Port Output */
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};
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/* Register map for DIO port (even interrupt) */
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struct dio_port_even_int {
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uint8_t RESERVED0;
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volatile uint8_t IN; /* Port Input */
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uint8_t RESERVED1;
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volatile uint8_t OUT; /* Port Output */
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};
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/* Peripheral declarations */
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#define CS ((struct cs *) CS_BASE)
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#define P3 ((struct dio_port_odd_int *) (DIO_BASE + 0x0020))
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#define P6 ((struct dio_port_even_int *) (DIO_BASE + 0x0040))
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/* Peripheral bit definitions */
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/* DCORSEL Bit Mask */
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#define CS_CTL0_DCORSEL_MASK ((uint32_t)0x00070000)
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/* Nominal DCO Frequency Range (MHz): 2 to 4 */
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#define CS_CTL0_DCORSEL_1 ((uint32_t)0x00010000)
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/* Nominal DCO Frequency Range (MHz): 16 to 32 */
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#define CS_CTL0_DCORSEL_4 ((uint32_t)0x00040000)
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/* CS control key value */
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#define CS_KEY_VAL ((uint32_t)0x0000695A)
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/* Protects Sector 0 from program or erase */
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#define FLCTL_BANK0_MAIN_WEPROT_PROT0 ((uint32_t)0x00000001)
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/* Protects Sector 1 from program or erase */
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#define FLCTL_BANK0_MAIN_WEPROT_PROT1 ((uint32_t)0x00000002)
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#ifdef __cplusplus
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}
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#endif
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#endif /* OPENOCD_LOADERS_FLASH_MSP432_MSP432P401X_H */
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