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mirror of git://git.code.sf.net/p/openocd/code synced 2025-07-25 15:06:54 +10:00
openocd/tcl/chip/st/spear/quirk_no_srst.tcl
Antonio Borneo f5657aa76e tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change
Jimtcl commit 1843b79a03dd ("expr: TIP 526, only support a single
arg") drops the support for multi-argument syntax for the TCL
command 'expr'.

In the TCL scripts distributed with OpenOCD there are 1700+ lines
that should be modified before switching to jimtcl 0.81.

Apply the script below on every script in tcl folder. It fixes
more than 92% of the lines

%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---
 #!/usr/bin/perl -Wpi

 my $re_sym = qr{[a-z_][a-z0-9_]*}i;
 my $re_var = qr{(?:\$|\$::)$re_sym};
 my $re_const = qr{0x[0-9a-f]+|[0-9]+|[0-9]*\.[0-9]*}i;
 my $re_item = qr{(?:~\s*)?(?:$re_var|$re_const)};
 my $re_op = qr{<<|>>|[+\-*/&|]};
 my $re_expr = qr{(
     (?:\(\s*(?:$re_item|(?-1))\s*\)|$re_item)
     \s*$re_op\s*
     (?:$re_item|(?-1)|\(\s*(?:$re_item|(?-1))\s*\))
 )}x;

 # [expr [dict get $regsC100 SYM] + HEXNUM]
 s/\[expr (\[dict get $re_var $re_sym\s*\] \+ *$re_const)\]/\[expr \{$1\}\]/;

 # [ expr (EXPR) ]
 # [ expr EXPR ]
 # note: $re_expr captures '$3'
 s/\[(\s*expr\s*)\((\s*$re_expr\s*)\)(\s*)\]/\[$1\{$2\}$4\]/;
 s/\[(\s*expr\s*)($re_expr)(\s*)\]/\[$1\{$2\}$4\]/;
%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---%<---

Change-Id: I0d6bddc6abf6dd29062f2b4e72b5a2b5080293b9
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/6159
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-05-08 09:48:44 +01:00

76 lines
1.7 KiB
Tcl

# Quirks to bypass missing SRST on JTAG connector
# EVALSPEAr310 Rev. 2.0
# http://www.st.com/spear
#
# Date: 2010-08-17
# Author: Antonio Borneo <borneo.antonio@gmail.com>
# For boards that have JTAG SRST not connected.
# We use "arm9 vector_catch reset" to catch button reset event.
$_TARGETNAME configure -event reset-assert sp_reset_assert
$_TARGETNAME configure -event reset-deassert-post sp_reset_deassert_post
# keeps the name of the SPEAr target
global sp_target_name
set sp_target_name $_TARGETNAME
# Keeps the argument of "reset" command (run, init, halt).
global sp_reset_mode
set sp_reset_mode ""
# Helper procedure. Returns 0 is target is halted.
proc sp_is_halted {} {
global sp_target_name
return [expr [string compare [$sp_target_name curstate] "halted" ] == 0]
}
# wait for reset button to be pressed, causing CPU to get halted
proc sp_reset_deassert_post {} {
global sp_reset_mode
set bar(0) |
set bar(1) /
set bar(2) -
set bar(3) \\
poll on
echo "====> Press reset button on the board <===="
for {set i 0} { [sp_is_halted] == 0 } { set i [expr {$i + 1}]} {
echo -n "$bar([expr {$i & 3}])\r"
sleep 200
}
# Remove catch reset event
arm9 vector_catch none
# CPU is halted, but we typed "reset run" ...
if { [string compare $sp_reset_mode "run"] == 0 } {
resume
}
}
# Override reset-assert, since no SRST available
# Catch reset event
proc sp_reset_assert {} {
arm9 vector_catch reset
}
# Override default init_reset{mode} to catch parameter "mode"
proc init_reset {mode} {
global sp_reset_mode
set sp_reset_mode $mode
# We need to detect CPU get halted, so exit from halt
if { [sp_is_halted] } {
echo "Resuming CPU to detect reset"
resume
}
# Execute default init_reset{mode}
jtag arp_init-reset
}