Memory controller drivers for v5.17 - OMAP GPMC

1. Add support for AM64 SoC.
 2. Minor improvement: use platform_get_irq().
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmHFq0cQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD18wsD/0efj2Ex0um0R1w8RyesHbQZW3XNOApncRY
 52vNV77QDtrgOwZpMIU0t+WW0vAqBQ9vXxZ8J/XtsyfkYHymGJLBzLClVeddXRv/
 mOrnVYnNxpySRBDJnbzXge2w53U2mCnIJHe490/y3RlNKmxibvRUGcaR8egDaRmu
 JyIjKgMqC5S4D0/qIYm3EgvWG6t2bEHF3E/wAlbBaCZMFQgIu5+rEAKzfIbCBFPs
 O1EleSe56Tx8XVi47s0yB9bolWQabIx6+ED0hi6VsDiOJNgMaVaLbU1hzusO3pvv
 V5qLoXJnOVbyzNFmUpWUylplX8SImCdZl/U/T0KQsYihc74J1JjS6OBuBzXqNX93
 w/uG5x5cXSEELWOU+WuhLzgfxCHDyT/bmRW/gTtgmvPa3xxphom1kJcmKjslp6Bi
 o8P/kvIdweixEM3EorOalD0ztX0q5eWNoJ/I9ObYNqgh3ls2BjyWzV5oe42/oFXE
 B24zmZuNHt5XAcATTGcTEjZCZCBWErdMTwZnIV7gXSh5p3kvDPSMwrqP+wFvNjyg
 O8Ifd1fqnIXVLtFVqN/mHbUfEyZrkjVcjxSBkb5p9nB2gtfa7BMJhvyA+rxZOBte
 MmKpVt9DFZ17I6mmAywXVVnMePut6bJ8Fqq6E4ewuza3aAOXB2i2nrDGcu75gn3k
 UEJ0ZwQCnQ==
 =eb46
 -----END PGP SIGNATURE-----

Merge tag 'memory-controller-drv-omap-5.17' into nand/next

Memory controller drivers for v5.17 - OMAP GPMC

1. Add support for AM64 SoC.
2. Minor improvement: use platform_get_irq().

[miquel.raynal@bootlin.com: A first commit introduced a new omap
compatible and another moved the IDs to a header which created a
conflict: moving the new ID as well in the header fixed it.]

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
This commit is contained in:
Miquel Raynal 2021-12-31 12:31:38 +01:00
commit 2997e48716
5 changed files with 66 additions and 24 deletions

View File

@ -23,13 +23,20 @@ properties:
items: items:
- enum: - enum:
- ti,am3352-gpmc - ti,am3352-gpmc
- ti,am64-gpmc
- ti,omap2420-gpmc - ti,omap2420-gpmc
- ti,omap2430-gpmc - ti,omap2430-gpmc
- ti,omap3430-gpmc - ti,omap3430-gpmc
- ti,omap4430-gpmc - ti,omap4430-gpmc
reg: reg:
maxItems: 1 minItems: 1
maxItems: 2
reg-names:
items:
- const: cfg
- const: data
interrupts: interrupts:
maxItems: 1 maxItems: 1
@ -44,6 +51,9 @@ properties:
items: items:
- const: fck - const: fck
power-domains:
maxItems: 1
dmas: dmas:
items: items:
- description: DMA channel for GPMC NAND prefetch - description: DMA channel for GPMC NAND prefetch
@ -133,6 +143,17 @@ required:
- "#address-cells" - "#address-cells"
- "#size-cells" - "#size-cells"
allOf:
- if:
properties:
compatible:
contains:
const: ti,am64-gpmc
then:
required:
- reg-names
- power-domains
additionalProperties: false additionalProperties: false
examples: examples:

View File

@ -237,6 +237,7 @@ struct gpmc_device {
struct omap3_gpmc_regs context; struct omap3_gpmc_regs context;
int nirqs; int nirqs;
unsigned int is_suspended:1; unsigned int is_suspended:1;
struct resource *data;
}; };
static struct irq_domain *gpmc_irq_domain; static struct irq_domain *gpmc_irq_domain;
@ -1456,12 +1457,18 @@ static void gpmc_mem_exit(void)
} }
} }
static void gpmc_mem_init(void) static void gpmc_mem_init(struct gpmc_device *gpmc)
{ {
int cs; int cs;
if (!gpmc->data) {
/* All legacy devices have same data IO window */
gpmc_mem_root.start = GPMC_MEM_START; gpmc_mem_root.start = GPMC_MEM_START;
gpmc_mem_root.end = GPMC_MEM_END; gpmc_mem_root.end = GPMC_MEM_END;
} else {
gpmc_mem_root.start = gpmc->data->start;
gpmc_mem_root.end = gpmc->data->end;
}
/* Reserve all regions that has been set up by bootloader */ /* Reserve all regions that has been set up by bootloader */
for (cs = 0; cs < gpmc_cs_num; cs++) { for (cs = 0; cs < gpmc_cs_num; cs++) {
@ -1888,6 +1895,7 @@ static const struct of_device_id gpmc_dt_ids[] = {
{ .compatible = "ti,omap3430-gpmc" }, /* omap3430 & omap3630 */ { .compatible = "ti,omap3430-gpmc" }, /* omap3430 & omap3630 */
{ .compatible = "ti,omap4430-gpmc" }, /* omap4430 & omap4460 & omap543x */ { .compatible = "ti,omap4430-gpmc" }, /* omap4430 & omap4460 & omap543x */
{ .compatible = "ti,am3352-gpmc" }, /* am335x devices */ { .compatible = "ti,am3352-gpmc" }, /* am335x devices */
{ .compatible = "ti,am64-gpmc" },
{ } { }
}; };
@ -2175,7 +2183,7 @@ static int gpmc_probe_generic_child(struct platform_device *pdev,
} }
} }
if (of_device_is_compatible(child, "ti,omap2-nand")) { if (of_match_node(omap_nand_ids, child)) {
/* NAND specific setup */ /* NAND specific setup */
val = 8; val = 8;
of_property_read_u32(child, "nand-bus-width", &val); of_property_read_u32(child, "nand-bus-width", &val);
@ -2502,21 +2510,29 @@ static int gpmc_probe(struct platform_device *pdev)
gpmc->dev = &pdev->dev; gpmc->dev = &pdev->dev;
platform_set_drvdata(pdev, gpmc); platform_set_drvdata(pdev, gpmc);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0); res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cfg");
if (!res) if (!res) {
return -ENOENT; /* legacy DT */
gpmc_base = devm_platform_ioremap_resource(pdev, 0);
if (IS_ERR(gpmc_base))
return PTR_ERR(gpmc_base);
} else {
gpmc_base = devm_ioremap_resource(&pdev->dev, res); gpmc_base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(gpmc_base)) if (IS_ERR(gpmc_base))
return PTR_ERR(gpmc_base); return PTR_ERR(gpmc_base);
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "data");
if (!res) { if (!res) {
dev_err(&pdev->dev, "Failed to get resource: irq\n"); dev_err(&pdev->dev, "couldn't get data reg resource\n");
return -ENOENT; return -ENOENT;
} }
gpmc->irq = res->start; gpmc->data = res;
}
gpmc->irq = platform_get_irq(pdev, 0);
if (gpmc->irq < 0)
return gpmc->irq;
gpmc_l3_clk = devm_clk_get(&pdev->dev, "fck"); gpmc_l3_clk = devm_clk_get(&pdev->dev, "fck");
if (IS_ERR(gpmc_l3_clk)) { if (IS_ERR(gpmc_l3_clk)) {
@ -2562,7 +2578,7 @@ static int gpmc_probe(struct platform_device *pdev)
dev_info(gpmc->dev, "GPMC revision %d.%d\n", GPMC_REVISION_MAJOR(l), dev_info(gpmc->dev, "GPMC revision %d.%d\n", GPMC_REVISION_MAJOR(l),
GPMC_REVISION_MINOR(l)); GPMC_REVISION_MINOR(l));
gpmc_mem_init(); gpmc_mem_init(gpmc);
rc = gpmc_gpio_init(gpmc); rc = gpmc_gpio_init(gpmc);
if (rc) if (rc)
goto gpio_init_failed; goto gpio_init_failed;

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@ -42,6 +42,7 @@ config MTD_NAND_OMAP2
tristate "OMAP2, OMAP3, OMAP4 and Keystone NAND controller" tristate "OMAP2, OMAP3, OMAP4 and Keystone NAND controller"
depends on ARCH_OMAP2PLUS || ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST depends on ARCH_OMAP2PLUS || ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST
depends on HAS_IOMEM depends on HAS_IOMEM
select OMAP_GPMC if ARCH_K3
help help
Support for NAND flash on Texas Instruments OMAP2, OMAP3, OMAP4 Support for NAND flash on Texas Instruments OMAP2, OMAP3, OMAP4
and Keystone platforms. and Keystone platforms.

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@ -2290,11 +2290,7 @@ static int omap_nand_remove(struct platform_device *pdev)
return ret; return ret;
} }
static const struct of_device_id omap_nand_ids[] = { /* omap_nand_ids defined in linux/platform_data/mtd-nand-omap2.h */
{ .compatible = "ti,omap2-nand", },
{ .compatible = "ti,am64-nand", },
{},
};
MODULE_DEVICE_TABLE(of, omap_nand_ids); MODULE_DEVICE_TABLE(of, omap_nand_ids);
static struct platform_driver omap_nand_driver = { static struct platform_driver omap_nand_driver = {

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@ -7,6 +7,7 @@
#define _MTD_NAND_OMAP2_H #define _MTD_NAND_OMAP2_H
#include <linux/mtd/partitions.h> #include <linux/mtd/partitions.h>
#include <linux/mod_devicetable.h>
#define GPMC_BCH_NUM_REMAINDER 8 #define GPMC_BCH_NUM_REMAINDER 8
@ -61,4 +62,11 @@ struct gpmc_nand_regs {
void __iomem *gpmc_bch_result5[GPMC_BCH_NUM_REMAINDER]; void __iomem *gpmc_bch_result5[GPMC_BCH_NUM_REMAINDER];
void __iomem *gpmc_bch_result6[GPMC_BCH_NUM_REMAINDER]; void __iomem *gpmc_bch_result6[GPMC_BCH_NUM_REMAINDER];
}; };
#endif
static const struct of_device_id omap_nand_ids[] = {
{ .compatible = "ti,omap2-nand", },
{ .compatible = "ti,am64-nand", },
{},
};
#endif /* _MTD_NAND_OMAP2_H */