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cxl fixes for v6.5-rc5
- Fixup the Sanitixe device ABI that was merged for v6.5 to hide some sysfs files when the necessary support is missing. Update the ABI documentation around this as well. -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQT9vPEBxh63bwxRYEEPzq5USduLdgUCZMvhjwAKCRAPzq5USduL dnifAQC9cl8R0bHhphAMstXUb9/GNh2Vxojr+MJkQweKRtc33gEAhjVVCyZ1mEHh cWjVhtCwIYp/k3h8smBZ2VmK0wXc0wA= =kAni -----END PGP SIGNATURE----- Merge tag 'cxl-fixes-6.5-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl Pull cxl fixes from Vishal Verma: - Fixup the Sanitixe device ABI that was merged for v6.5 to hide some sysfs files when the necessary support is missing. Update the ABI documentation around this as well. * tag 'cxl-fixes-6.5-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl: cxl/memdev: Only show sanitize sysfs files when supported cxl/memdev: Document security state in kern-doc cxl/memdev: Improve sanitize ABI descriptions
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638c1913d2
@ -82,7 +82,12 @@ Description:
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whether it resides in persistent capacity, volatile capacity,
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whether it resides in persistent capacity, volatile capacity,
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or the LSA, is made permanently unavailable by whatever means
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or the LSA, is made permanently unavailable by whatever means
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is appropriate for the media type. This functionality requires
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is appropriate for the media type. This functionality requires
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the device to be not be actively decoding any HPA ranges.
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the device to be disabled, that is, not actively decoding any
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HPA ranges. This permits avoiding explicit global CPU cache
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management, relying instead for it to be done when a region
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transitions between software programmed and hardware committed
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states. If this file is not present, then there is no hardware
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support for the operation.
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What /sys/bus/cxl/devices/memX/security/erase
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What /sys/bus/cxl/devices/memX/security/erase
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@ -92,7 +97,13 @@ Contact: linux-cxl@vger.kernel.org
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Description:
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Description:
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(WO) Write a boolean 'true' string value to this attribute to
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(WO) Write a boolean 'true' string value to this attribute to
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secure erase user data by changing the media encryption keys for
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secure erase user data by changing the media encryption keys for
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all user data areas of the device.
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all user data areas of the device. This functionality requires
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the device to be disabled, that is, not actively decoding any
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HPA ranges. This permits avoiding explicit global CPU cache
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management, relying instead for it to be done when a region
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transitions between software programmed and hardware committed
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states. If this file is not present, then there is no hardware
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support for the operation.
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What: /sys/bus/cxl/devices/memX/firmware/
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What: /sys/bus/cxl/devices/memX/firmware/
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@ -121,6 +121,45 @@ static bool cxl_is_security_command(u16 opcode)
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return false;
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return false;
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}
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}
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static void cxl_set_security_cmd_enabled(struct cxl_security_state *security,
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u16 opcode)
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{
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switch (opcode) {
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case CXL_MBOX_OP_SANITIZE:
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set_bit(CXL_SEC_ENABLED_SANITIZE, security->enabled_cmds);
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break;
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case CXL_MBOX_OP_SECURE_ERASE:
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set_bit(CXL_SEC_ENABLED_SECURE_ERASE,
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security->enabled_cmds);
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break;
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case CXL_MBOX_OP_GET_SECURITY_STATE:
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set_bit(CXL_SEC_ENABLED_GET_SECURITY_STATE,
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security->enabled_cmds);
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break;
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case CXL_MBOX_OP_SET_PASSPHRASE:
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set_bit(CXL_SEC_ENABLED_SET_PASSPHRASE,
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security->enabled_cmds);
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break;
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case CXL_MBOX_OP_DISABLE_PASSPHRASE:
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set_bit(CXL_SEC_ENABLED_DISABLE_PASSPHRASE,
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security->enabled_cmds);
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break;
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case CXL_MBOX_OP_UNLOCK:
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set_bit(CXL_SEC_ENABLED_UNLOCK, security->enabled_cmds);
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break;
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case CXL_MBOX_OP_FREEZE_SECURITY:
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set_bit(CXL_SEC_ENABLED_FREEZE_SECURITY,
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security->enabled_cmds);
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break;
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case CXL_MBOX_OP_PASSPHRASE_SECURE_ERASE:
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set_bit(CXL_SEC_ENABLED_PASSPHRASE_SECURE_ERASE,
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security->enabled_cmds);
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break;
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default:
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break;
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}
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}
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static bool cxl_is_poison_command(u16 opcode)
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static bool cxl_is_poison_command(u16 opcode)
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{
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{
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#define CXL_MBOX_OP_POISON_CMDS 0x43
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#define CXL_MBOX_OP_POISON_CMDS 0x43
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@ -677,7 +716,8 @@ static void cxl_walk_cel(struct cxl_memdev_state *mds, size_t size, u8 *cel)
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u16 opcode = le16_to_cpu(cel_entry[i].opcode);
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u16 opcode = le16_to_cpu(cel_entry[i].opcode);
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struct cxl_mem_command *cmd = cxl_mem_find_command(opcode);
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struct cxl_mem_command *cmd = cxl_mem_find_command(opcode);
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if (!cmd && !cxl_is_poison_command(opcode)) {
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if (!cmd && (!cxl_is_poison_command(opcode) ||
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!cxl_is_security_command(opcode))) {
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dev_dbg(dev,
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dev_dbg(dev,
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"Opcode 0x%04x unsupported by driver\n", opcode);
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"Opcode 0x%04x unsupported by driver\n", opcode);
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continue;
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continue;
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@ -689,6 +729,9 @@ static void cxl_walk_cel(struct cxl_memdev_state *mds, size_t size, u8 *cel)
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if (cxl_is_poison_command(opcode))
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if (cxl_is_poison_command(opcode))
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cxl_set_poison_cmd_enabled(&mds->poison, opcode);
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cxl_set_poison_cmd_enabled(&mds->poison, opcode);
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if (cxl_is_security_command(opcode))
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cxl_set_security_cmd_enabled(&mds->security, opcode);
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dev_dbg(dev, "Opcode 0x%04x enabled\n", opcode);
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dev_dbg(dev, "Opcode 0x%04x enabled\n", opcode);
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}
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}
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}
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}
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@ -477,9 +477,28 @@ static struct attribute_group cxl_memdev_pmem_attribute_group = {
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.attrs = cxl_memdev_pmem_attributes,
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.attrs = cxl_memdev_pmem_attributes,
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};
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};
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static umode_t cxl_memdev_security_visible(struct kobject *kobj,
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struct attribute *a, int n)
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{
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struct device *dev = kobj_to_dev(kobj);
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struct cxl_memdev *cxlmd = to_cxl_memdev(dev);
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struct cxl_memdev_state *mds = to_cxl_memdev_state(cxlmd->cxlds);
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if (a == &dev_attr_security_sanitize.attr &&
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!test_bit(CXL_SEC_ENABLED_SANITIZE, mds->security.enabled_cmds))
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return 0;
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if (a == &dev_attr_security_erase.attr &&
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!test_bit(CXL_SEC_ENABLED_SECURE_ERASE, mds->security.enabled_cmds))
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return 0;
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return a->mode;
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}
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static struct attribute_group cxl_memdev_security_attribute_group = {
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static struct attribute_group cxl_memdev_security_attribute_group = {
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.name = "security",
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.name = "security",
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.attrs = cxl_memdev_security_attributes,
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.attrs = cxl_memdev_security_attributes,
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.is_visible = cxl_memdev_security_visible,
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};
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};
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static const struct attribute_group *cxl_memdev_attribute_groups[] = {
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static const struct attribute_group *cxl_memdev_attribute_groups[] = {
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@ -244,6 +244,19 @@ enum poison_cmd_enabled_bits {
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CXL_POISON_ENABLED_MAX
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CXL_POISON_ENABLED_MAX
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};
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};
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/* Device enabled security commands */
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enum security_cmd_enabled_bits {
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CXL_SEC_ENABLED_SANITIZE,
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CXL_SEC_ENABLED_SECURE_ERASE,
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CXL_SEC_ENABLED_GET_SECURITY_STATE,
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CXL_SEC_ENABLED_SET_PASSPHRASE,
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CXL_SEC_ENABLED_DISABLE_PASSPHRASE,
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CXL_SEC_ENABLED_UNLOCK,
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CXL_SEC_ENABLED_FREEZE_SECURITY,
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CXL_SEC_ENABLED_PASSPHRASE_SECURE_ERASE,
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CXL_SEC_ENABLED_MAX
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};
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/**
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/**
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* struct cxl_poison_state - Driver poison state info
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* struct cxl_poison_state - Driver poison state info
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*
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*
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@ -346,6 +359,7 @@ struct cxl_fw_state {
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* struct cxl_security_state - Device security state
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* struct cxl_security_state - Device security state
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*
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*
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* @state: state of last security operation
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* @state: state of last security operation
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* @enabled_cmds: All security commands enabled in the CEL
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* @poll: polling for sanitization is enabled, device has no mbox irq support
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* @poll: polling for sanitization is enabled, device has no mbox irq support
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* @poll_tmo_secs: polling timeout
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* @poll_tmo_secs: polling timeout
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* @poll_dwork: polling work item
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* @poll_dwork: polling work item
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@ -353,6 +367,7 @@ struct cxl_fw_state {
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*/
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*/
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struct cxl_security_state {
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struct cxl_security_state {
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unsigned long state;
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unsigned long state;
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DECLARE_BITMAP(enabled_cmds, CXL_SEC_ENABLED_MAX);
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bool poll;
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bool poll;
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int poll_tmo_secs;
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int poll_tmo_secs;
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struct delayed_work poll_dwork;
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struct delayed_work poll_dwork;
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@ -434,6 +449,7 @@ struct cxl_dev_state {
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* @next_persistent_bytes: persistent capacity change pending device reset
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* @next_persistent_bytes: persistent capacity change pending device reset
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* @event: event log driver state
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* @event: event log driver state
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* @poison: poison driver state info
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* @poison: poison driver state info
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* @security: security driver state info
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* @fw: firmware upload / activation state
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* @fw: firmware upload / activation state
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* @mbox_send: @dev specific transport for transmitting mailbox commands
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* @mbox_send: @dev specific transport for transmitting mailbox commands
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*
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*
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