From 466a885182857c437cf8527bb683a9064167fb61 Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Tue, 15 Aug 2023 11:34:34 +0100 Subject: [PATCH 1/4] riscv: dts: starfive: fix jh7110 qspi sort order Emil pointed out that "13010000 sorts after 12070000". Reshuffle the entries to be in-order. Reported-by: Emil Renner Berthing Reviewed-by: Emil Renner Berthing Signed-off-by: Conor Dooley --- arch/riscv/boot/dts/starfive/jh7110.dtsi | 38 ++++++++++++------------ 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi index 9aa563898868..e85464c328d0 100644 --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi @@ -676,25 +676,6 @@ status = "disabled"; }; - qspi: spi@13010000 { - compatible = "starfive,jh7110-qspi", "cdns,qspi-nor"; - reg = <0x0 0x13010000 0x0 0x10000>, - <0x0 0x21000000 0x0 0x400000>; - interrupts = <25>; - clocks = <&syscrg JH7110_SYSCLK_QSPI_REF>, - <&syscrg JH7110_SYSCLK_QSPI_AHB>, - <&syscrg JH7110_SYSCLK_QSPI_APB>; - clock-names = "ref", "ahb", "apb"; - resets = <&syscrg JH7110_SYSRST_QSPI_APB>, - <&syscrg JH7110_SYSRST_QSPI_AHB>, - <&syscrg JH7110_SYSRST_QSPI_REF>; - reset-names = "qspi", "qspi-ocp", "rstc_ref"; - cdns,fifo-depth = <256>; - cdns,fifo-width = <4>; - cdns,trigger-address = <0x0>; - status = "disabled"; - }; - spi3: spi@12070000 { compatible = "arm,pl022", "arm,primecell"; reg = <0x0 0x12070000 0x0 0x10000>; @@ -767,6 +748,25 @@ #thermal-sensor-cells = <0>; }; + qspi: spi@13010000 { + compatible = "starfive,jh7110-qspi", "cdns,qspi-nor"; + reg = <0x0 0x13010000 0x0 0x10000>, + <0x0 0x21000000 0x0 0x400000>; + interrupts = <25>; + clocks = <&syscrg JH7110_SYSCLK_QSPI_REF>, + <&syscrg JH7110_SYSCLK_QSPI_AHB>, + <&syscrg JH7110_SYSCLK_QSPI_APB>; + clock-names = "ref", "ahb", "apb"; + resets = <&syscrg JH7110_SYSRST_QSPI_APB>, + <&syscrg JH7110_SYSRST_QSPI_AHB>, + <&syscrg JH7110_SYSRST_QSPI_REF>; + reset-names = "qspi", "qspi-ocp", "rstc_ref"; + cdns,fifo-depth = <256>; + cdns,fifo-width = <4>; + cdns,trigger-address = <0x0>; + status = "disabled"; + }; + syscrg: clock-controller@13020000 { compatible = "starfive,jh7110-syscrg"; reg = <0x0 0x13020000 0x0 0x10000>; From d19c10d5b95ab6a30acde6d2bdb7ab915971563b Mon Sep 17 00:00:00 2001 From: Drew Fustini Date: Fri, 11 Aug 2023 17:47:16 -0700 Subject: [PATCH 2/4] dt-bindings: riscv: Add BeagleV Ahead board compatibles Document the compatible strings for the BeagleV Ahead board which uses the T-Head TH1520 SoC. Link: https://beagleboard.org/beaglev-ahead Acked-by: Krzysztof Kozlowski Reviewed-by: Guo Ren Reviewed-by: Conor Dooley Signed-off-by: Drew Fustini Signed-off-by: Conor Dooley --- Documentation/devicetree/bindings/riscv/thead.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/riscv/thead.yaml b/Documentation/devicetree/bindings/riscv/thead.yaml index e62f6821372e..301912dcd290 100644 --- a/Documentation/devicetree/bindings/riscv/thead.yaml +++ b/Documentation/devicetree/bindings/riscv/thead.yaml @@ -17,6 +17,10 @@ properties: const: '/' compatible: oneOf: + - description: BeagleV Ahead single board computer + items: + - const: beagle,beaglev-ahead + - const: thead,th1520 - description: Sipeed Lichee Pi 4A board for the Sipeed Lichee Module 4A items: - enum: From 31ceedee8aa4559494d2ebb85c484efff6f5afa1 Mon Sep 17 00:00:00 2001 From: Drew Fustini Date: Fri, 11 Aug 2023 17:47:17 -0700 Subject: [PATCH 3/4] riscv: dts: thead: add BeagleV Ahead board device tree The BeagleV Ahead single board computer uses the T-Head TH1520 SoC. Add a minimal device tree to support basic uart/gpio/dmac drivers so that a user can boot to a basic shell. Link: https://beagleboard.org/beaglev-ahead Reviewed-by: Guo Ren Reviewed-by: Conor Dooley Signed-off-by: Drew Fustini Signed-off-by: Conor Dooley --- arch/riscv/boot/dts/thead/Makefile | 2 +- .../boot/dts/thead/th1520-beaglev-ahead.dts | 61 +++++++++++++++++++ 2 files changed, 62 insertions(+), 1 deletion(-) create mode 100644 arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts diff --git a/arch/riscv/boot/dts/thead/Makefile b/arch/riscv/boot/dts/thead/Makefile index e311fc9a5939..b55a17127c2b 100644 --- a/arch/riscv/boot/dts/thead/Makefile +++ b/arch/riscv/boot/dts/thead/Makefile @@ -1,2 +1,2 @@ # SPDX-License-Identifier: GPL-2.0 -dtb-$(CONFIG_ARCH_THEAD) += th1520-lichee-pi-4a.dtb +dtb-$(CONFIG_ARCH_THEAD) += th1520-lichee-pi-4a.dtb th1520-beaglev-ahead.dtb diff --git a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts new file mode 100644 index 000000000000..70e8042c8304 --- /dev/null +++ b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts @@ -0,0 +1,61 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright (C) 2023 Jisheng Zhang + * Copyright (C) 2023 Drew Fustini + */ + +/dts-v1/; + +#include "th1520.dtsi" + +/ { + model = "BeagleV Ahead"; + compatible = "beagle,beaglev-ahead", "thead,th1520"; + + aliases { + gpio0 = &gpio0; + gpio1 = &gpio1; + gpio2 = &gpio2; + gpio3 = &gpio3; + serial0 = &uart0; + serial1 = &uart1; + serial2 = &uart2; + serial3 = &uart3; + serial4 = &uart4; + serial5 = &uart5; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x00000000 0x1 0x00000000>; + + }; +}; + +&osc { + clock-frequency = <24000000>; +}; + +&osc_32k { + clock-frequency = <32768>; +}; + +&apb_clk { + clock-frequency = <62500000>; +}; + +&uart_sclk { + clock-frequency = <100000000>; +}; + +&dmac0 { + status = "okay"; +}; + +&uart0 { + status = "okay"; +}; From a3ce3ff28385c7c0f8503e83f5d42d2083e16390 Mon Sep 17 00:00:00 2001 From: Drew Fustini Date: Mon, 24 Jul 2023 11:21:29 -0700 Subject: [PATCH 4/4] riscv: dts: change TH1520 files to dual license Modify the SPDX-License-Identifier for dual license of GPL-2.0 OR MIT. Signed-off-by: Drew Fustini Acked-by: Jisheng Zhang Acked-by: Guo Ren Reviewed-by: Guo Ren Reviewed-by: Conor Dooley Signed-off-by: Conor Dooley --- arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi | 2 +- arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts | 2 +- arch/riscv/boot/dts/thead/th1520.dtsi | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi index 4b0249ac710f..a802ab110429 100644 --- a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi +++ b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: (GPL-2.0 OR MIT) /* * Copyright (C) 2023 Jisheng Zhang */ diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts b/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts index a1248b2ee3a3..9a3884a73e13 100644 --- a/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts +++ b/arch/riscv/boot/dts/thead/th1520-lichee-pi-4a.dts @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: (GPL-2.0 OR MIT) /* * Copyright (C) 2023 Jisheng Zhang */ diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi index 56a73134b49e..ce708183b6f6 100644 --- a/arch/riscv/boot/dts/thead/th1520.dtsi +++ b/arch/riscv/boot/dts/thead/th1520.dtsi @@ -1,4 +1,4 @@ -// SPDX-License-Identifier: GPL-2.0 +// SPDX-License-Identifier: (GPL-2.0 OR MIT) /* * Copyright (C) 2021 Alibaba Group Holding Limited. * Copyright (C) 2023 Jisheng Zhang