Lucas Stach 53cab4d871 soc: imx: imx8mp-blk-ctrl: register HSIO PLL clock as bus_power_dev child ... The blk-ctrl device is deliberately placed outside of the GPC power domain as it needs to control the power sequencing of the blk-ctrl domains together with the GPC domains. Clock runtime PM works by operating on the clock parent device, which doesn't translate into the neccessary GPC power domain action if the clk parent is not part of the GPC power domain. Use the bus_power_device as the parent for the clock to trigger the proper GPC domain actions on clock runtime power management. Fixes: 2cbee26e5d ("soc: imx: imx8mp-blk-ctrl: expose high performance PLL clock") Reported-by: Yannic Moog <Y.Moog@phytec.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Tested-by: Yannic Moog <y.moog@phytec.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>		2023-07-19 15:44:02 +08:00
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amlogic	drivers: meson: secure-pwrc: always enable DMA domain	2023-06-19 11:02:37 +02:00
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imx	soc: imx: imx8mp-blk-ctrl: register HSIO PLL clock as bus_power_dev child	2023-07-19 15:44:02 +08:00
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