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drm/amdgpu: use doorbell mgr for MES kernel doorbells

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This patch:
- Removes the existing doorbell management code, and its variables
  from the doorbell_init function, it will be done in doorbell
  manager now.
- uses the doorbell page created for MES kernel level needs (doorbells
  for MES self tests)
- current MES code was allocating MES doorbells in MES process context,
  but those were getting written using kernel doorbell calls. This patch
  instead allocates a MES kernel doorbell for this (in add_hw_queue).

V2: Create an extra page of doorbells for MES during kernel doorbell
    creation (Alex)
V4: Move MES doorbell size and page offset objects in this patch from
    patch 6.

Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian Koenig <christian.koenig@amd.com>
Reviewed-by: Christian Koenig <christian.koenig@amd.com>
Signed-off-by: Shashank Sharma <shashank.sharma@amd.com>
Signed-off-by: Arvind Yadav <arvind.yadav@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Shashank Sharma 2023-07-14 16:22:38 +02:00 committed by Alex Deucher
parent 8da0d694a3
commit e3cbb1f404
3 changed files with 47 additions and 57 deletions
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4
drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
View File

@ -145,6 +145,10 @@ int amdgpu_doorbell_create_kernel_doorbells(struct amdgpu_device *adev)
/* Reserve first num_kernel_doorbells (page-aligned) for kernel ops */
size = ALIGN(adev->doorbell.num_kernel_doorbells * sizeof(u32), PAGE_SIZE);
/* Allocate an extra page for MES kernel usages (ring test) */
adev->mes.db_start_dw_offset = size / sizeof(u32);
size += PAGE_SIZE;
r = amdgpu_bo_create_kernel(adev,
size,
PAGE_SIZE,

94
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
View File

@ -68,91 +68,70 @@ unsigned int amdgpu_mes_get_doorbell_dw_offset_in_bar(
doorbell_id * 2);
}
static int amdgpu_mes_queue_doorbell_get(struct amdgpu_device *adev,
static int amdgpu_mes_kernel_doorbell_get(struct amdgpu_device *adev,
struct amdgpu_mes_process *process,
int ip_type, uint64_t *doorbell_index)
{
unsigned int offset, found;
struct amdgpu_mes *mes = &adev->mes;
if (ip_type == AMDGPU_RING_TYPE_SDMA) {
if (ip_type == AMDGPU_RING_TYPE_SDMA)
offset = adev->doorbell_index.sdma_engine[0];
found = find_next_zero_bit(process->doorbell_bitmap,
AMDGPU_MES_MAX_NUM_OF_QUEUES_PER_PROCESS,
offset);
} else {
found = find_first_zero_bit(process->doorbell_bitmap,
AMDGPU_MES_MAX_NUM_OF_QUEUES_PER_PROCESS);
}
else
offset = 0;
if (found >= AMDGPU_MES_MAX_NUM_OF_QUEUES_PER_PROCESS) {
found = find_next_zero_bit(mes->doorbell_bitmap, mes->num_mes_dbs, offset);
if (found >= mes->num_mes_dbs) {
DRM_WARN("No doorbell available\n");
return -ENOSPC;
}
set_bit(found, process->doorbell_bitmap);
*doorbell_index = amdgpu_mes_get_doorbell_dw_offset_in_bar(adev,
process->doorbell_index, found);
set_bit(found, mes->doorbell_bitmap);
/* Get the absolute doorbell index on BAR */
*doorbell_index = mes->db_start_dw_offset + found * 2;
return 0;
}
static void amdgpu_mes_queue_doorbell_free(struct amdgpu_device *adev,
static void amdgpu_mes_kernel_doorbell_free(struct amdgpu_device *adev,
struct amdgpu_mes_process *process,
uint32_t doorbell_index)
{
unsigned int old, doorbell_id;
unsigned int old, rel_index;
struct amdgpu_mes *mes = &adev->mes;
doorbell_id = doorbell_index -
(process->doorbell_index *
amdgpu_mes_doorbell_process_slice(adev)) / sizeof(u32);
doorbell_id /= 2;
old = test_and_clear_bit(doorbell_id, process->doorbell_bitmap);
/* Find the relative index of the doorbell in this object */
rel_index = (doorbell_index - mes->db_start_dw_offset) / 2;
old = test_and_clear_bit(rel_index, mes->doorbell_bitmap);
WARN_ON(!old);
}
static int amdgpu_mes_doorbell_init(struct amdgpu_device *adev)
{
size_t doorbell_start_offset;
size_t doorbell_aperture_size;
size_t doorbell_process_limit;
size_t aggregated_doorbell_start;
int i;
struct amdgpu_mes *mes = &adev->mes;
aggregated_doorbell_start = (adev->doorbell_index.max_assignment + 1) * sizeof(u32);
aggregated_doorbell_start =
roundup(aggregated_doorbell_start, PAGE_SIZE);
/* Bitmap for dynamic allocation of kernel doorbells */
mes->doorbell_bitmap = bitmap_zalloc(PAGE_SIZE / sizeof(u32), GFP_KERNEL);
if (!mes->doorbell_bitmap) {
DRM_ERROR("Failed to allocate MES doorbell bitmap\n");
return -ENOMEM;
}
doorbell_start_offset = aggregated_doorbell_start + PAGE_SIZE;
doorbell_start_offset =
roundup(doorbell_start_offset,
amdgpu_mes_doorbell_process_slice(adev));
mes->num_mes_dbs = PAGE_SIZE / AMDGPU_ONE_DOORBELL_SIZE;
for (i = 0; i < AMDGPU_MES_PRIORITY_NUM_LEVELS; i++) {
adev->mes.aggregated_doorbells[i] = mes->db_start_dw_offset + i * 2;
set_bit(i, mes->doorbell_bitmap);
}
doorbell_aperture_size = adev->doorbell.size;
doorbell_aperture_size =
rounddown(doorbell_aperture_size,
amdgpu_mes_doorbell_process_slice(adev));
if (doorbell_aperture_size > doorbell_start_offset)
doorbell_process_limit =
(doorbell_aperture_size - doorbell_start_offset) /
amdgpu_mes_doorbell_process_slice(adev);
else
return -ENOSPC;
adev->mes.doorbell_id_offset = doorbell_start_offset / sizeof(u32);
adev->mes.max_doorbell_slices = doorbell_process_limit;
/* allocate Qword range for aggregated doorbell */
for (i = 0; i < AMDGPU_MES_PRIORITY_NUM_LEVELS; i++)
adev->mes.aggregated_doorbells[i] =
aggregated_doorbell_start / sizeof(u32) + i * 2;
DRM_INFO("max_doorbell_slices=%zu\n", doorbell_process_limit);
return 0;
}
static void amdgpu_mes_doorbell_free(struct amdgpu_device *adev)
{
bitmap_free(adev->mes.doorbell_bitmap);
}
int amdgpu_mes_init(struct amdgpu_device *adev)
{
int i, r;
@ -251,6 +230,7 @@ void amdgpu_mes_fini(struct amdgpu_device *adev)
amdgpu_device_wb_free(adev, adev->mes.sch_ctx_offs);
amdgpu_device_wb_free(adev, adev->mes.query_status_fence_offs);
amdgpu_device_wb_free(adev, adev->mes.read_val_offs);
amdgpu_mes_doorbell_free(adev);
idr_destroy(&adev->mes.pasid_idr);
idr_destroy(&adev->mes.gang_id_idr);
@ -682,7 +662,7 @@ int amdgpu_mes_add_hw_queue(struct amdgpu_device *adev, int gang_id,
*queue_id = queue->queue_id = r;
/* allocate a doorbell index for the queue */
r = amdgpu_mes_queue_doorbell_get(adev, gang->process,
r = amdgpu_mes_kernel_doorbell_get(adev, gang->process,
qprops->queue_type,
&qprops->doorbell_off);
if (r)
@ -740,7 +720,7 @@ int amdgpu_mes_add_hw_queue(struct amdgpu_device *adev, int gang_id,
return 0;
clean_up_doorbell:
amdgpu_mes_queue_doorbell_free(adev, gang->process,
amdgpu_mes_kernel_doorbell_free(adev, gang->process,
qprops->doorbell_off);
clean_up_queue_id:
spin_lock_irqsave(&adev->mes.queue_id_lock, flags);
@ -795,7 +775,7 @@ int amdgpu_mes_remove_hw_queue(struct amdgpu_device *adev, int queue_id)
queue_id);
list_del(&queue->list);
amdgpu_mes_queue_doorbell_free(adev, gang->process,
amdgpu_mes_kernel_doorbell_free(adev, gang->process,
queue->doorbell_off);
amdgpu_mes_unlock(&adev->mes);

6
drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
View File

@ -27,6 +27,7 @@
#include "amdgpu_irq.h"
#include "kgd_kfd_interface.h"
#include "amdgpu_gfx.h"
#include "amdgpu_doorbell.h"
#include <linux/sched/mm.h>
#define AMDGPU_MES_MAX_COMPUTE_PIPES 8
@ -128,6 +129,11 @@ struct amdgpu_mes {
int (*kiq_hw_init)(struct amdgpu_device *adev);
int (*kiq_hw_fini)(struct amdgpu_device *adev);
/* MES doorbells */
uint32_t db_start_dw_offset;
uint32_t num_mes_dbs;
unsigned long *doorbell_bitmap;
/* ip specific functions */
const struct amdgpu_mes_funcs *funcs;
};