mirror of
https://kernel.googlesource.com/pub/scm/linux/kernel/git/stable/linux-stable.git
synced 2025-09-28 17:40:21 +10:00
spi: spi-sun4i: fix early activation
The SPI interface is activated before the CPOL setting is applied. In that moment, the clock idles high and CS goes low. After a short delay, CPOL and other settings are applied, which may cause the clock to change state and idle low. This transition is not part of a clock cycle, and it can confuse the receiving device. To prevent this unexpected transition, activate the interface while CPOL and the other settings are being applied. Signed-off-by: Alessandro Grassi <alessandro.grassi@mailbox.org> Link: https://patch.msgid.link/20250502095520.13825-1-alessandro.grassi@mailbox.org Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
parent
e979a7c79f
commit
fb98bd0a13
@ -264,6 +264,9 @@ static int sun4i_spi_transfer_one(struct spi_controller *host,
|
||||
else
|
||||
reg |= SUN4I_CTL_DHB;
|
||||
|
||||
/* Now that the settings are correct, enable the interface */
|
||||
reg |= SUN4I_CTL_ENABLE;
|
||||
|
||||
sun4i_spi_write(sspi, SUN4I_CTL_REG, reg);
|
||||
|
||||
/* Ensure that we have a parent clock fast enough */
|
||||
@ -404,7 +407,7 @@ static int sun4i_spi_runtime_resume(struct device *dev)
|
||||
}
|
||||
|
||||
sun4i_spi_write(sspi, SUN4I_CTL_REG,
|
||||
SUN4I_CTL_ENABLE | SUN4I_CTL_MASTER | SUN4I_CTL_TP);
|
||||
SUN4I_CTL_MASTER | SUN4I_CTL_TP);
|
||||
|
||||
return 0;
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user