mirror of
https://kernel.googlesource.com/pub/scm/linux/kernel/git/stable/linux-stable.git
synced 2025-11-04 07:44:51 +10:00
8238b45798
There are several places in the kernel where wait_on_bit is not followed by a memory barrier (for example, in drivers/md/dm-bufio.c:new_read). On architectures with weak memory ordering, it may happen that memory accesses that follow wait_on_bit are reordered before wait_on_bit and they may return invalid data. Fix this class of bugs by introducing a new function "test_bit_acquire" that works like test_bit, but has acquire memory ordering semantics. Signed-off-by: Mikulas Patocka <mpatocka@redhat.com> Acked-by: Will Deacon <will@kernel.org> Cc: stable@vger.kernel.org Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
70 lines
1.4 KiB
Plaintext
70 lines
1.4 KiB
Plaintext
=============
|
|
Atomic bitops
|
|
=============
|
|
|
|
While our bitmap_{}() functions are non-atomic, we have a number of operations
|
|
operating on single bits in a bitmap that are atomic.
|
|
|
|
|
|
API
|
|
---
|
|
|
|
The single bit operations are:
|
|
|
|
Non-RMW ops:
|
|
|
|
test_bit()
|
|
|
|
RMW atomic operations without return value:
|
|
|
|
{set,clear,change}_bit()
|
|
clear_bit_unlock()
|
|
|
|
RMW atomic operations with return value:
|
|
|
|
test_and_{set,clear,change}_bit()
|
|
test_and_set_bit_lock()
|
|
|
|
Barriers:
|
|
|
|
smp_mb__{before,after}_atomic()
|
|
|
|
|
|
All RMW atomic operations have a '__' prefixed variant which is non-atomic.
|
|
|
|
|
|
SEMANTICS
|
|
---------
|
|
|
|
Non-atomic ops:
|
|
|
|
In particular __clear_bit_unlock() suffers the same issue as atomic_set(),
|
|
which is why the generic version maps to clear_bit_unlock(), see atomic_t.txt.
|
|
|
|
|
|
RMW ops:
|
|
|
|
The test_and_{}_bit() operations return the original value of the bit.
|
|
|
|
|
|
ORDERING
|
|
--------
|
|
|
|
Like with atomic_t, the rule of thumb is:
|
|
|
|
- non-RMW operations are unordered;
|
|
|
|
- RMW operations that have no return value are unordered;
|
|
|
|
- RMW operations that have a return value are fully ordered.
|
|
|
|
- RMW operations that are conditional are fully ordered.
|
|
|
|
Except for a successful test_and_set_bit_lock() which has ACQUIRE semantics,
|
|
clear_bit_unlock() which has RELEASE semantics and test_bit_acquire which has
|
|
ACQUIRE semantics.
|
|
|
|
Since a platform only has a single means of achieving atomic operations
|
|
the same barriers as for atomic_t are used, see atomic_t.txt.
|
|
|