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db7a346405
Add #clock-cells binding to model Sierra as clock provider and include clock IDs for PLL_CMNLC and PLL_CMNLC1. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210319124128.13308-12-kishon@ti.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
21 lines
469 B
C
21 lines
469 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* This header provides constants for Cadence SERDES.
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*/
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#ifndef _DT_BINDINGS_CADENCE_SERDES_H
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#define _DT_BINDINGS_CADENCE_SERDES_H
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/* Torrent */
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#define TORRENT_SERDES_NO_SSC 0
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#define TORRENT_SERDES_EXTERNAL_SSC 1
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#define TORRENT_SERDES_INTERNAL_SSC 2
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#define CDNS_TORRENT_REFCLK_DRIVER 0
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/* Sierra */
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#define CDNS_SIERRA_PLL_CMNLC 0
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#define CDNS_SIERRA_PLL_CMNLC1 1
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#endif /* _DT_BINDINGS_CADENCE_SERDES_H */
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