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	Bump versions based on changes submitted during 2.6.21 merge window. Signed-off-by: Jeff Garzik <jeff@garzik.org>
		
			
				
	
	
		
			290 lines
		
	
	
		
			7.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			290 lines
		
	
	
		
			7.5 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
/*
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 *  sata_uli.c - ULi Electronics SATA
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 *
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 *
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 *  This program is free software; you can redistribute it and/or modify
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 *  it under the terms of the GNU General Public License as published by
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 *  the Free Software Foundation; either version 2, or (at your option)
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 *  any later version.
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 *
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 *  This program is distributed in the hope that it will be useful,
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 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
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 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 *  GNU General Public License for more details.
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 *
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 *  You should have received a copy of the GNU General Public License
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 *  along with this program; see the file COPYING.  If not, write to
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 *  the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
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 *
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 *
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 *  libata documentation is available via 'make {ps|pdf}docs',
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 *  as Documentation/DocBook/libata.*
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 *
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 *  Hardware documentation available under NDA.
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 *
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 */
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/blkdev.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/device.h>
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#include <scsi/scsi_host.h>
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#include <linux/libata.h>
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#define DRV_NAME	"sata_uli"
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#define DRV_VERSION	"1.1"
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enum {
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	uli_5289		= 0,
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	uli_5287		= 1,
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	uli_5281		= 2,
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	uli_max_ports		= 4,
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	/* PCI configuration registers */
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	ULI5287_BASE		= 0x90, /* sata0 phy SCR registers */
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	ULI5287_OFFS		= 0x10, /* offset from sata0->sata1 phy regs */
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	ULI5281_BASE		= 0x60, /* sata0 phy SCR  registers */
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	ULI5281_OFFS		= 0x60, /* offset from sata0->sata1 phy regs */
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};
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struct uli_priv {
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	unsigned int		scr_cfg_addr[uli_max_ports];
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};
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static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent);
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static u32 uli_scr_read (struct ata_port *ap, unsigned int sc_reg);
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static void uli_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val);
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static const struct pci_device_id uli_pci_tbl[] = {
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	{ PCI_VDEVICE(AL, 0x5289), uli_5289 },
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	{ PCI_VDEVICE(AL, 0x5287), uli_5287 },
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	{ PCI_VDEVICE(AL, 0x5281), uli_5281 },
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	{ }	/* terminate list */
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};
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static struct pci_driver uli_pci_driver = {
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	.name			= DRV_NAME,
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	.id_table		= uli_pci_tbl,
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	.probe			= uli_init_one,
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	.remove			= ata_pci_remove_one,
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};
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static struct scsi_host_template uli_sht = {
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	.module			= THIS_MODULE,
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	.name			= DRV_NAME,
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	.ioctl			= ata_scsi_ioctl,
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	.queuecommand		= ata_scsi_queuecmd,
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	.can_queue		= ATA_DEF_QUEUE,
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	.this_id		= ATA_SHT_THIS_ID,
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	.sg_tablesize		= LIBATA_MAX_PRD,
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	.cmd_per_lun		= ATA_SHT_CMD_PER_LUN,
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	.emulated		= ATA_SHT_EMULATED,
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	.use_clustering		= ATA_SHT_USE_CLUSTERING,
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	.proc_name		= DRV_NAME,
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	.dma_boundary		= ATA_DMA_BOUNDARY,
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	.slave_configure	= ata_scsi_slave_config,
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	.slave_destroy		= ata_scsi_slave_destroy,
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	.bios_param		= ata_std_bios_param,
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};
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static const struct ata_port_operations uli_ops = {
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	.port_disable		= ata_port_disable,
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	.tf_load		= ata_tf_load,
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	.tf_read		= ata_tf_read,
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	.check_status		= ata_check_status,
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	.exec_command		= ata_exec_command,
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	.dev_select		= ata_std_dev_select,
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	.bmdma_setup            = ata_bmdma_setup,
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	.bmdma_start            = ata_bmdma_start,
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	.bmdma_stop		= ata_bmdma_stop,
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	.bmdma_status		= ata_bmdma_status,
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	.qc_prep		= ata_qc_prep,
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	.qc_issue		= ata_qc_issue_prot,
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	.data_xfer		= ata_data_xfer,
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	.freeze			= ata_bmdma_freeze,
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	.thaw			= ata_bmdma_thaw,
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	.error_handler		= ata_bmdma_error_handler,
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	.post_internal_cmd	= ata_bmdma_post_internal_cmd,
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	.irq_handler		= ata_interrupt,
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	.irq_clear		= ata_bmdma_irq_clear,
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	.irq_on			= ata_irq_on,
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	.irq_ack		= ata_irq_ack,
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	.scr_read		= uli_scr_read,
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	.scr_write		= uli_scr_write,
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	.port_start		= ata_port_start,
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};
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static struct ata_port_info uli_port_info = {
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	.sht            = &uli_sht,
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	.flags		= ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
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			  ATA_FLAG_IGN_SIMPLEX,
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	.pio_mask       = 0x1f,		/* pio0-4 */
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	.udma_mask      = 0x7f,		/* udma0-6 */
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	.port_ops       = &uli_ops,
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};
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MODULE_AUTHOR("Peer Chen");
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MODULE_DESCRIPTION("low-level driver for ULi Electronics SATA controller");
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MODULE_LICENSE("GPL");
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MODULE_DEVICE_TABLE(pci, uli_pci_tbl);
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MODULE_VERSION(DRV_VERSION);
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static unsigned int get_scr_cfg_addr(struct ata_port *ap, unsigned int sc_reg)
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{
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	struct uli_priv *hpriv = ap->host->private_data;
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	return hpriv->scr_cfg_addr[ap->port_no] + (4 * sc_reg);
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}
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static u32 uli_scr_cfg_read (struct ata_port *ap, unsigned int sc_reg)
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{
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	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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	unsigned int cfg_addr = get_scr_cfg_addr(ap, sc_reg);
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	u32 val;
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	pci_read_config_dword(pdev, cfg_addr, &val);
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	return val;
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}
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static void uli_scr_cfg_write (struct ata_port *ap, unsigned int scr, u32 val)
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{
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	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
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	unsigned int cfg_addr = get_scr_cfg_addr(ap, scr);
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	pci_write_config_dword(pdev, cfg_addr, val);
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}
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static u32 uli_scr_read (struct ata_port *ap, unsigned int sc_reg)
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{
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	if (sc_reg > SCR_CONTROL)
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		return 0xffffffffU;
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	return uli_scr_cfg_read(ap, sc_reg);
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}
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static void uli_scr_write (struct ata_port *ap, unsigned int sc_reg, u32 val)
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{
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	if (sc_reg > SCR_CONTROL)	//SCR_CONTROL=2, SCR_ERROR=1, SCR_STATUS=0
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		return;
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	uli_scr_cfg_write(ap, sc_reg, val);
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}
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static int uli_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
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{
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	static int printed_version;
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	struct ata_probe_ent *probe_ent;
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	struct ata_port_info *ppi[2];
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	int rc;
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	unsigned int board_idx = (unsigned int) ent->driver_data;
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	struct uli_priv *hpriv;
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	void __iomem * const *iomap;
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	if (!printed_version++)
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		dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n");
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	rc = pcim_enable_device(pdev);
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	if (rc)
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		return rc;
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	rc = pci_request_regions(pdev, DRV_NAME);
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	if (rc) {
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		pcim_pin_device(pdev);
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		return rc;
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	}
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	rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
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	if (rc)
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		return rc;
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	rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
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	if (rc)
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		return rc;
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	ppi[0] = ppi[1] = &uli_port_info;
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	probe_ent = ata_pci_init_native_mode(pdev, ppi, ATA_PORT_PRIMARY | ATA_PORT_SECONDARY);
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	if (!probe_ent)
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		return -ENOMEM;
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	hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL);
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	if (!hpriv)
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		return -ENOMEM;
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	probe_ent->private_data = hpriv;
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	iomap = pcim_iomap_table(pdev);
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	switch (board_idx) {
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	case uli_5287:
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		hpriv->scr_cfg_addr[0] = ULI5287_BASE;
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		hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS;
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       		probe_ent->n_ports = 4;
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		probe_ent->port[2].cmd_addr = iomap[0] + 8;
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		probe_ent->port[2].altstatus_addr =
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		probe_ent->port[2].ctl_addr = (void __iomem *)
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			((unsigned long)iomap[1] | ATA_PCI_CTL_OFS) + 4;
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		probe_ent->port[2].bmdma_addr = iomap[4] + 16;
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		hpriv->scr_cfg_addr[2] = ULI5287_BASE + ULI5287_OFFS*4;
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		probe_ent->port[3].cmd_addr = iomap[2] + 8;
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		probe_ent->port[3].altstatus_addr =
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		probe_ent->port[3].ctl_addr = (void __iomem *)
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			((unsigned long)iomap[3] | ATA_PCI_CTL_OFS) + 4;
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		probe_ent->port[3].bmdma_addr = iomap[4] + 24;
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		hpriv->scr_cfg_addr[3] = ULI5287_BASE + ULI5287_OFFS*5;
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		ata_std_ports(&probe_ent->port[2]);
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		ata_std_ports(&probe_ent->port[3]);
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		break;
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	case uli_5289:
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		hpriv->scr_cfg_addr[0] = ULI5287_BASE;
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		hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS;
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		break;
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	case uli_5281:
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		hpriv->scr_cfg_addr[0] = ULI5281_BASE;
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		hpriv->scr_cfg_addr[1] = ULI5281_BASE + ULI5281_OFFS;
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		break;
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	default:
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		BUG();
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		break;
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	}
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	pci_set_master(pdev);
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	pci_intx(pdev, 1);
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	if (!ata_device_add(probe_ent))
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		return -ENODEV;
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	devm_kfree(&pdev->dev, probe_ent);
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	return 0;
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}
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static int __init uli_init(void)
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{
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	return pci_register_driver(&uli_pci_driver);
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}
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static void __exit uli_exit(void)
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{
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	pci_unregister_driver(&uli_pci_driver);
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}
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module_init(uli_init);
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module_exit(uli_exit);
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