Uwe Kleine-König 9aff206cfc pwm: mediatek: Fix duty and period setting ... [ Upstream commit f21d136caf ] The period generated by the hardware is (PWMDWIDTH + 1) << CLKDIV) / freq according to my tests with a signal analyser and also the documentation. The current algorithm doesn't consider the `+ 1` part and so configures slightly too high periods. The same issue exists for the duty cycle setting. So subtract 1 from both the register values for period and duty cycle. If period is 0, bail out, if duty_cycle is 0, just disable the PWM which results in a constant low output. Fixes: caf065f8fd ("pwm: Add MediaTek PWM support") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/6d1fa87a76f8020bfe3171529b8e19baffceab10.1753717973.git.u.kleine-koenig@baylibre.com Cc: stable@vger.kernel.org Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2025-08-28 16:24:36 +02:00
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core.c
Kconfig
Makefile
pwm-ab8500.c
pwm-atmel-hlcdc.c
pwm-atmel-tcb.c
pwm-atmel.c
pwm-bcm2835.c
pwm-bcm-iproc.c
pwm-bcm-kona.c
pwm-berlin.c
pwm-brcmstb.c
pwm-clps711x.c
pwm-crc.c
pwm-cros-ec.c
pwm-dwc.c
pwm-ep93xx.c
pwm-fsl-ftm.c
pwm-hibvt.c
pwm-img.c
pwm-imx1.c
pwm-imx27.c
pwm-imx-tpm.c
pwm-intel-lgm.c
pwm-iqs620a.c
pwm-jz4740.c
pwm-keembay.c
pwm-lp3943.c
pwm-lpc18xx-sct.c
pwm-lpc32xx.c
pwm-lpss-pci.c
pwm-lpss-platform.c
pwm-lpss.c
pwm-lpss.h
pwm-mediatek.c	pwm: mediatek: Fix duty and period setting	2025-08-28 16:24:36 +02:00
pwm-meson.c
pwm-mtk-disp.c
pwm-mxs.c
pwm-ntxec.c
pwm-omap-dmtimer.c
pwm-pca9685.c
pwm-pxa.c
pwm-raspberrypi-poe.c
pwm-rcar.c
pwm-renesas-tpu.c
pwm-rockchip.c
pwm-samsung.c
pwm-sifive.c
pwm-sl28cpld.c
pwm-spear.c
pwm-sprd.c
pwm-sti.c
pwm-stm32-lp.c
pwm-stm32.c
pwm-stmpe.c
pwm-sun4i.c
pwm-tegra.c
pwm-tiecap.c
pwm-tiehrpwm.c
pwm-twl-led.c
pwm-twl.c
pwm-visconti.c
pwm-vt8500.c
sysfs.c