Krzysztof Kozlowski fdca4c03f4 clk: qcom: dispcc-sm8750: Fix setting rate byte and pixel clocks ... commit 0acf9e65a4 upstream. On SM8750 the setting rate of pixel and byte clocks, while the parent DSI PHY PLL, fails with: disp_cc_mdss_byte0_clk_src: rcg didn't update its configuration. DSI PHY PLL has to be unprepared and its "PLL Power Down" bits in CMN_CTRL_0 asserted. Mark these clocks with CLK_OPS_PARENT_ENABLE to ensure the parent is enabled during rate changes. Cc: stable@vger.kernel.org Fixes: f1080d8dab ("clk: qcom: dispcc-sm8750: Add SM8750 Display clock controller") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250520090741.45820-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2025-08-20 18:41:36 +02:00
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actions
analogbits	clk: analogbits: Fix incorrect calculation of vco rate delta	2025-01-16 13:43:49 -08:00
at91	clk: at91: sam9x7: update pll clk ranges	2025-08-15 16:39:09 +02:00
axis
axs10x
baikal-t1
bcm	clk: bcm: rpi: Add NULL check in raspberrypi_clk_register()	2025-05-06 14:41:55 -07:00
berlin
davinci	clk: davinci: Add NULL check in davinci_lpsc_clk_register()	2025-08-15 16:38:58 +02:00
hisilicon
imgtec	clk: imgtec: use %pe for better readability of errors while printing	2025-03-04 12:15:25 -08:00
imx	clk: imx95-blk-ctl: Fix synchronous abort	2025-08-15 16:39:10 +02:00
ingenic
keystone	clk: keystone: syscon-clk: Do not use syscon helper to build regmap	2025-03-04 11:49:53 -08:00
mediatek	clk: mediatek: Add SMI LARBs reset for MT8188	2025-02-27 14:17:01 -08:00
meson	clk: meson: Do not enable by default during compile testing	2025-05-15 14:44:50 +02:00
microchip
mmp	clk: mmp: Fix NULL vs IS_ERR() check	2025-03-07 11:05:01 -08:00
mstar
mvebu
mxs
nuvoton
nxp
pistachio
pxa
qcom	clk: qcom: dispcc-sm8750: Fix setting rate byte and pixel clocks	2025-08-20 18:41:36 +02:00
ralink	clk: ralink: mtmips: remove duplicated 'xtal' clock for Ralink SoC RT3883	2025-01-13 13:35:38 -08:00
renesas	clk: renesas: rzg2l: Postpone updating priv->clks[]	2025-08-20 18:41:28 +02:00
rockchip	I've recently moved computers (among other things) so I'm sending this from a	2025-05-30 09:15:40 -07:00
samsung	clk: samsung: gs101: fix alternate mout_hsi0_usb20_ref parent clock	2025-08-20 18:40:48 +02:00
sifive
socfpga	clk: socfpga: stratix10: Optimize local variables	2025-04-24 17:38:07 -05:00
sophgo	clk: sophgo: Add clock controller support for SG2044 SoC	2025-05-07 08:00:09 +08:00
spacemit	clk: spacemit: ccu_pll: fix error return value in recalc_rate callback	2025-08-15 16:39:12 +02:00
spear
sprd
st
starfive	clk: starfive: Make _clk_get become a common helper function	2025-01-14 10:55:00 -08:00
stm32
sunxi	clk: sunxi: Do not enable by default during compile testing	2025-04-27 13:49:18 +08:00
sunxi-ng	clk: sunxi-ng: v3s: Fix de clock definition	2025-08-15 16:39:08 +02:00
tegra	clk: tegra: periph: Fix error handling and resolve unsigned compare warning	2025-08-20 18:41:22 +02:00
thead	clk: thead: Mark essential bus clocks as CLK_IGNORE_UNUSED	2025-08-20 18:41:24 +02:00
ti	The various patchsets are summarized below. Plus of course many	2025-01-26 18:36:23 -08:00
uniphier
ux500
versatile
visconti
x86
xilinx	clk: clocking-wizard: Fix the round rate handling for versal	2025-08-15 16:39:12 +02:00
zynq
zynqmp
.kunitconfig
clk_kunit_helpers.c
clk_parent_data_test.h
clk_test.c
clk-apple-nco.c
clk-asm9260.c
clk-aspeed.c
clk-aspeed.h
clk-ast2600.c
clk-axi-clkgen.c	clk: clk-axi-clkgen: fix fpfd_max frequency for zynq	2025-08-15 16:39:02 +02:00
clk-axm5516.c
clk-bd718x7.c
clk-bm1880.c
clk-bulk.c
clk-cdce706.c
clk-cdce925.c
clk-clps711x.c
clk-composite.c
clk-conf.c
clk-cs2000-cp.c
clk-devres.c
clk-divider.c
clk-en7523.c	pci-v6.14-changes	2025-01-25 16:03:40 -08:00
clk-ep93xx.c	clk: ep93xx: make const read-only arrays static	2025-01-13 13:27:26 -08:00
clk-eyeq.c
clk-fixed-factor.c
clk-fixed-mmio.c
clk-fixed-rate_test.c
clk-fixed-rate_test.h
clk-fixed-rate.c
clk-fractional-divider_test.c
clk-fractional-divider.c
clk-fractional-divider.h
clk-fsl-flexspi.c
clk-fsl-sai.c
clk-gate_test.c
clk-gate.c
clk-gemini.c
clk-gpio.c
clk-hi655x.c
clk-highbank.c
clk-hsdk-pll.c
clk-k210.c
clk-lan966x.c
clk-lmk04832.c	clk: lmk04832: make read-only const arrays static	2025-01-13 13:27:12 -08:00
clk-lochnagar.c
clk-loongson1.c
clk-loongson2.c	Merge branch 'clk-fixes' into clk-next	2025-01-21 11:22:46 -08:00
clk-max9485.c
clk-max77686.c
clk-milbeaut.c
clk-moxart.c
clk-multiplier.c
clk-mux.c
clk-nomadik.c	clk: Use str_enable_disable-like helpers	2025-01-15 12:27:04 -08:00
clk-npcm7xx.c
clk-npcm8xx.c
clk-nspire.c
clk-palmas.c
clk-plldig.c
clk-pwm.c
clk-qoriq.c
clk-renesas-pcie.c
clk-rk808.c
clk-s2mps11.c	clk: s2mps11: initialise clk_hw_onecell_data::num before accessing ::hws[] in probe()	2025-05-08 14:01:44 -07:00
clk-scmi.c	clk: scmi: Handle case where child clocks are initialized before their parents	2025-06-19 17:30:02 -07:00
clk-scpi.c
clk-si514.c
clk-si521xx.c
clk-si544.c
clk-si570.c
clk-si5341.c
clk-si5351.c
clk-si5351.h
clk-sp7021.c
clk-sparx5.c
clk-stm32f4.c	clk: stm32f4: fix an uninitialized variable	2025-03-04 11:50:44 -08:00
clk-stm32h7.c
clk-tps68470.c
clk-twl6040.c
clk-twl.c
clk-versaclock3.c	clk: versaclock3: Add support for the 5L35023 variant	2024-12-10 14:49:29 -08:00
clk-versaclock5.c
clk-versaclock7.c
clk-vt8500.c
clk-wm831x.c
clk-xgene.c	clk: Use str_enable_disable-like helpers	2025-01-15 12:27:04 -08:00
clk.c	Merge branches 'clk-parent', 'clk-renesas', 'clk-mediatek' and 'clk-cleanup' into clk-next	2025-03-26 11:26:26 -07:00
clk.h
clkdev.c	ARM: 9445/1: clkdev: Mark some functions with __printf() attribute	2025-03-26 13:31:49 +00:00
Kconfig	clk: spacemit: Add clock support for SpacemiT K1 SoC	2025-04-17 03:22:53 +08:00
kunit_clk_assigned_rates_multiple_consumer.dtso
kunit_clk_assigned_rates_multiple.dtso
kunit_clk_assigned_rates_null_consumer.dtso
kunit_clk_assigned_rates_null.dtso
kunit_clk_assigned_rates_one_consumer.dtso
kunit_clk_assigned_rates_one.dtso
kunit_clk_assigned_rates_u64_multiple_consumer.dtso
kunit_clk_assigned_rates_u64_multiple.dtso
kunit_clk_assigned_rates_u64_one_consumer.dtso
kunit_clk_assigned_rates_u64_one.dtso
kunit_clk_assigned_rates_without_consumer.dtso
kunit_clk_assigned_rates_without.dtso
kunit_clk_assigned_rates_zero_consumer.dtso
kunit_clk_assigned_rates_zero.dtso
kunit_clk_assigned_rates.h
kunit_clk_fixed_rate_test.dtso
kunit_clk_parent_data_test.dtso
Makefile	clk: spacemit: Add clock support for SpacemiT K1 SoC	2025-04-17 03:22:53 +08:00